矽鍺奈米線在不同製程條件下之電特性研究

Abstract

本論文中我們成功地利用間隙壁（spacer）製做出奈米等級的矽鍺奈米線，在不同的溫度、時間，將矽鍺氧化，探討在不同條件下所造成的鍺含量和所對應的電性分析，再和傳統的複晶矽奈米線去作比較。所有的矽鍺薄膜都是利用冷壁式超高真空化學氣相沉積法（UHVCVD）在二氧化矽(SiO2)上沉積而成。我們利用掃瞄式電子顯微鏡Scanning Electron Microscopy (SEM)去觀察氧化前後的矽鍺奈米線的大小，發現在相同的製程條件下矽鍺奈米線和矽鍺薄膜有相同的氧化趨勢。此外，我們還可以利用鍺緻密化(Ge condensation)的技術做出更小的奈米線，增加其傳導率(conductivity)。

In the thesis, we successfully utilize the spacer to fabricate a SiGe nanowire, which oxidized at different temperatures, times, discussion the germanium content relative electrical analysis under the variant condition, and make the comparison with the conventional Poly-Si nanowire. All the SiGe films are deposition on SiO2 by cold-wall ultrahigh vacuum chemical vapor deposition (UHVCVD). We utilize Scanning Electron Microscopy (SEM) to observe the silicon germanium nanowire size before oxidation and after oxidation, discovery silicon germanium nanowire and silicon germanium thin film has the same oxidized tendency under the same oxidation condition. Additionally we also can utilized the technology of Ge condensation to makes a smaller nanowire, increases its conductivity.