標題: 具有氮化矽覆蓋層之形變N型金氧半場效電晶體之元件特性與熱載子退化效應
Device Characteristics and Hot Carrier Degradation of Strained NMOSFETs with SiN Capping Layer
作者: 謝雨霖
Yu-Lin Hsieh
林鴻志
黃調元
Horng-Chih Lin
Tiao-Yuan Huang
電子研究所
關鍵字: 形變通道;金氧半場效電晶體;氮化矽;strain channel;MOSFET;silicon nitride
公開日期: 2005
摘要: 當互補式金氧半場效電晶體的結構因微縮而達到其極限時,形變通道(strained channel)可用來增進載子的遷移率。已有研究證明,可利用矽與矽鍺之間晶格的不協調,而在矽鍺基板上製造出形變矽元件。雖然雙軸伸張形變矽在近年來被應用為增進載子遷移率的技術,而受到廣泛重視,但此技術被證明有如下缺點,如因在界面上有大量的貫穿差排而使得元件難以製作,以及鍺原子會向外擴散、源極與汲極延伸區的摻雜易快速擴散和其基板的高成本…等等。相形之下,單軸形變卻可用簡單結構上的改變而製作出來,從而避免雙軸形變中複雜的晶圓製作、高成本以及大量缺陷等問題。 近期局部形變元件逐漸成為用來增進載子遷移率的主要技術(如氮化矽覆蓋之元件)。在這篇論文,我們證明在N型金氧半場效電晶體中,氮化矽覆蓋層及其相關沉積製程對元件特性與熱載子退化效應的影響。我們利用低壓化學氣相沉積系統沉積氮化矽覆蓋層,來造成元件通道的形變,進而增進其載子遷移率。而沉積氮化矽的過程中,多餘的熱預算(thermal budget)與形變效應會使臨界電壓下滑(threshold voltage roll-off)更加惡化。除此之外,氮化矽的覆蓋也會使熱載子退化效應更嚴重。
As the scaling of CMOS structure reaches its fundamental limits, the carrier mobility enhancement has been intensively pursued by introducing strain in the channel region. This has been demonstrated in strained Si devices on SiGe substrates by taking advantage of the lattice mismatch between Si and SiGe. Although biaxial tensile strained silicon has received considerable attention in the last decade as a technique for mobility enhancement, it has been proven to be difficult to implement because of misfit and threading dislocations, Ge up-diffusion, fast diffusion of S/D extensions, and high cost. In contrast, uniaxial strain can be more easily implemented by simple structure modification, thus avoiding the complex wafer fabrication, high cost, and defects of biaxial strain. Recently locally strained devices have emerged as the main technique for carrier mobility enhancement (e.g., SiN-capped devices). In this thesis, we investigated the impact of silicon nitride (SiN) capping layer and the associated deposition process on the device characteristics and hot-electron degradation of NMOSFETs. The SiN layer used to induce channel strain for mobility enhancement was deposited by low-pressure chemical vapor deposition (LPCVD). The deposition of the SiN would aggravate threshold voltage roll-off due to additional thermal budget and the strain effect. Besides, the device hot-electron degradation is aggravated by the SiN-capping.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009311557
http://hdl.handle.net/11536/78028
顯示於類別:畢業論文


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