完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 林榮謙 | en_US |
dc.contributor.author | Rung-Chien Lin | en_US |
dc.contributor.author | 黃宇中 | en_US |
dc.contributor.author | Yu-Chung Huang | en_US |
dc.date.accessioned | 2014-12-12T02:51:50Z | - |
dc.date.available | 2014-12-12T02:51:50Z | - |
dc.date.issued | 2006 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009311596 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/78066 | - |
dc.description.abstract | 本論文主要在研製一電容式介面的嵌入式系統,其特點在設計了一個自動選定量測範圍頻率的電路,論文中展示的範圍由0.01 Hz ~ 50 MHz,自動選頻的電路由比較器選擇出閘門時間最短且誤差在1%範圍內的計數值輸出,改善了傳統計頻器必需手調閘門時間以提升精準度;再加入電容-頻率轉換介面電路以及軟體程式的編程可同時應用在電容式微小感測器的量測。 本系統使用Altera DE2發展板做為硬體平台,以Verilog硬體描述語言與高度整合性的SoPC Builder實現嵌入式之頻率偵測,本獨立系統平台可達到體積小型化及低成本等要求,將可運用於脈衝頻率量測及多種電容式感測器量測系統。 | zh_TW |
dc.description.abstract | The objective goal of this thesis is to design an embedded system for capacitive sensor interface which features with an auto range frequency detection. The frequency detection range is from 0.01Hz to 50MHz. The traditional frequency counter which needs to adjust the gate time by hand is improved with auto range frequency detection to eliminate the error less than 1%. The frequency detection circuit can be adapt to the measurement of capacitive sensor by adding a sensor interface circuit. This system use Altera DE2 development board to be the platform and implement the embedded system for capacitive sensor interface by SoPC Builder which can achieve small area and low cost. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 嵌入式系統 | zh_TW |
dc.subject | 感測器 | zh_TW |
dc.subject | 介面電路 | zh_TW |
dc.subject | Embedded System | en_US |
dc.subject | FPGA | en_US |
dc.subject | sensor | en_US |
dc.subject | interface | en_US |
dc.title | 電容式感測器介面嵌入式系統 | zh_TW |
dc.title | An Embedded System for Capacitive Sensor Interface | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |