完整後設資料紀錄
DC 欄位語言
dc.contributor.author孫域晨en_US
dc.contributor.authorYUCHEN,SUNen_US
dc.contributor.author黃經堯en_US
dc.contributor.authorChingYao Huangen_US
dc.date.accessioned2014-12-12T02:51:59Z-
dc.date.available2014-12-12T02:51:59Z-
dc.date.issued2005en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009311615en_US
dc.identifier.urihttp://hdl.handle.net/11536/78084-
dc.description.abstract本論文提出一個針對無線通訊系統晶片設計的模擬及驗證平台。設計流程整合通訊協定分析和系統模擬在同一個步驟裡。提出來的平台可以將系統模擬、軟體開發及硬體模擬整合在同一個平台完成。這個平台對那些和別的平行設計有高度互動的通訊原件的驗證非常有用。本論文將介紹驗證平台的組成及設計方法。並提出相對應的系統晶片設計流程。我們也發展了一個參考設計根據超寬頻媒介控制層的設計。zh_TW
dc.description.abstractThis thesis proposes a simulation and verification platform for communication SoC designs. The design flow could combine protocol analysis and system simulation in single stage. This proposed platform enables the use of a single platform for multiple-purpose designs for communication system designs, including system simulation, software development and hardware modeling. The platform is especially useful for the designs of communication components whose behaviors are highly coupled with transmission medium and other parallel components. In the thesis, we would introduce components of the platform and design methodology. We also develop the related design flow based on the proposed platform. And a reference design, an UWB MAC design, would be introduced.en_US
dc.language.isoen_USen_US
dc.subject驗證zh_TW
dc.subject通訊zh_TW
dc.subjectverificationen_US
dc.subjectcommunicationen_US
dc.title通訊系統晶片之模擬驗證平台設計zh_TW
dc.titleDevelopment of Simulation and Verification Platform for Communication SoC Designsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
顯示於類別:畢業論文