標題: 具可調整預先增強器之6Gbps串列連結傳輸器
A 6Gbps Serial Link Transmitter with Tunable Pre-emphasis
作者: 朱昌敏
Chang-Min Chu
周世傑
Shyh-Jye Jou
電子研究所
關鍵字: 傳輸器;預先加強器;Transmitter;Pre-emphasis;Serial ATA
公開日期: 2005
摘要: 一直以來,個人電腦平臺的硬碟裝置,向來都是平行化ATA的介面規格,而隨著傳輸速率的提升,在高達1.5Gbits/sec下,以現有的平行化架構,難以再將頻寬提升。因此串列式ATA的技術規格因應而生,而第三代串列式ATA之應用將於2007年普及,到時,硬碟裝置的傳輸速度將可到達6Gbits/sec。 本論文中,我們主要完成高速串列連結之資料傳輸器並且建構可調變式信號預先加強器電路於其中,以符合串列式ATA 的規格。首先,針對串列式ATA規格以及高速傳輸器做一個概略的介紹與導讀。接下來,詳述傳輸器的電路架構以及設計理念,並且針對具有自我調整的預先加強器電路做介紹,最後,列出晶片的量測結果。 整體電路為採用TSMC 0.18um 1P6M CMOS 製程技術予已實現。此傳輸器在經過十公尺的纜線傳輸情況下仍可以達到傳輸速率6Gbps。且在電壓電源為1.8V下,總消耗功率為小於130mW。
For a long period of time, the industrial I/O standard interfaces for connecting storage device inside personal computers is Parallel Advanced Technology Attachment (PATA). However, due to the challenges in increasing the speed of ATA specification, a shift in design strategy is required. The new approach is Serial ATA specification. The application of SATA III will be available to all in 2007. At that time, the data rate of storage device such as hard discs will operated at 6Gbps. In this thesis, we implement a high speed serial link data transmitter with tunable pre-emphasis to fit with serial ATA specification. First, we introduce the serial link and serial ATA specification. Then, we describe the transmitter circuit and design issue. We also introduce the concept of the tunable pre-emphasis. Finally, the measurement results are showed and listed. The whole circuit is implemented by TSMC 0.18um 1P6M CMOS technology. The circuit can transmit data at 6Gbps data rate with 10m cable length. The supply voltage is 1.8v and the total power consumption is less than 130mW.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009311687
http://hdl.handle.net/11536/78159
顯示於類別:畢業論文


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