應用於H.264/AVC的高產量M串聯多重符號背景適應性二元算術解碼器

Abstract

背景適應性二元算術解碼器(CABAD)的多重符號運算程序有著極大的資料相依性以及適應性的機率估計，因此在硬體設計上這是很難直接運用平行化和管線化來加速。在本論文中，我們基於統計的資料分布特性提出兩個主要的方法來實現多重符號的CABAD。1)首先我們提出M串聯的架構可以有效率地提高算術編碼的產率。2)其次我們重新排列背景存儲器和使用一套小的快速緩衝貯存器來改善管線化的危害物。我們的解碼器在QP24下平均解一個巨方塊花費219個單位時間。這足以滿足層次4.0對1080HD格式每秒三十張畫面的影像作即時解碼。基於0.13微米聯華電子互補式金氧半導體製程，我們的多重符號CABAD設計在不含背景存儲器情況下需要11,937個邏輯閘，其操作時脈為115MHz。而我們的背景存儲器僅需481個單一接口靜態隨機存儲器位元組。

The multi-symbol procedure of CABAD has strong data dependencies and adaptive probability estimation, so that it is difficult to speedup the hardware design by directly applying parallelism and pipeline schemes. In this thesis, based on the result of data statistic we proposed two main methods to realize a high throughput multi-symbol CABAD. 1) First we propose the M-cascade structure efficiently increasing the throughput of arithmetic coding. 2) Secondly we rearrange the context memory and use small cache registers improve pipeline hazards. Our decoder averagely takes 219 cycles to decode a macro block in QP24. It is sufficient for level 4.0 to support 1080HD real-time decoding at 30fps. Based on 0.13μm UMC CMOS process, our multi-symbol CABAD design needs 11,937 gates without context memory and operates at 115 MHz. And our context memory only needs 481 bytes of single-port SRAM.