低功率超聲波壓控振盪器與其負電阻之研究

Abstract

本論文提出一個可應用於高頻的低功率損耗表面聲波振盪電路，以皮爾斯振盪器為基礎，並以三級串接取代原有之單一增益級。此電路以單一大電阻進行偏壓，具有直流耦合的作用，可避免使用電容進行耦合所帶來的面積與高頻損耗問題；並利用一電阻進行相位調節，可針對特定頻率增進其負電阻上限，且在此機制下的增益轉導值相對具有較大的自由度，使得此電路能夠達到低功率損耗的目標。本電路以台灣積體電路公司所提供的0.35μm 2P4M CMOS製程實現，輸出頻譜為622.6MHz，強度¬-33.19dBm，功率損耗為18.93mW。文末對模擬與量測結果分析比對，並針對此電路可能帶來的寄生振盪進行討論。

In this thesis, a low-power consumption voltage control SAW oscillator available for high frequency is proposed, which is developed based on a Pierce oscillator, and uses three-cascaded gain stage instead of a single one. It uses a single huge resistance for DC bias, and is provided with DC coupling function, which improves the area and power consumption problem caused by capacitor coupling. A small resistance is used for phase adjustment, which is capable to improve the negative resistance limit for certain frequency. The transconductance of the circuit is relatively tunable under this phase adjustment mechanism, which helps to achieve the goal of low power consumption. The circuit is implemented by TSMC 0.35μm 2P4M CMOS process, the output frequency is 622.6MHz, the magnitude of the fundamental tone is -33.19dBm, and the power consumption of the core circuit is 18.93Mw. At last we compare the simulation and the measurement result, and discuss the possible oscillation caused the parasitics.