威福-哈特利鏡像消除降頻器與雙頻道低雜訊放大器

Abstract

由於系統晶片時代的來臨，外差式接收機已不能滿足時代潮流的需要，所以低中頻架構是目前射頻接收機的主流架構。因此，在本篇論文中我們提出一個新的架構---“威福-哈特利鏡像消除降頻器”，並在實作中驗證此架構。雜訊指數對於接收機是一個很重要的規格，所以在本篇論文中介紹雙載子電晶體雜訊參數原理，以及應用於無線區域網路的雙頻道低雜訊放大器。 本篇論文主要以TSMC 0.35μm SiGe BiCMOS製程來設計與實現射頻電路。該射頻電路則包含了5.2GHz的威福-哈特利鏡像消除降頻器、異質接面雙載子電晶體雜訊參數分析、雙頻道中間級匹配低雜訊放大器、使用差動驅動電感雙頻道差動低雜訊放大器、使用變壓器雙頻道差動低雜訊放大器。

In order to increase the integration level, the heterodyne receiver is not capable to satisfy the requirement for the modern wireless application; therefore, the low-IF receiver architecture becomes one of the most popular architectures. In this thesis, a new low-IF architecture --- the Weaver-Hartley image rejection down-converter --- is demonstrated in this work. The noise figure is an important spec for receiver. In this thesis, we introduced the noise parameters principle of the bipolar transistor, and the dual band low noise amplifier for WLAN’s applications. In this thesis, several RF circuits are designed and implemented using the TSMC 0.35μm SiGe BiCMOS technology. The RFICs include the 5.2GHz Weaver-Hartley image rejection down-converter, the noise parameters analysis of the hetero-junction bipolar transistor, the concurrent inter-stage matching dual band LNA, the concurrent dual band differential LNA utilizing differentially driven inductor, and the concurrent dual band differential LNA utilizing transformer.