利用負向主動回授技巧之低壓降穩壓器

Abstract

本篇論文詳細討論了利用負向主動回授的補償技巧，來實現低壓降穩壓器 (LDO)，文章內容主要可以分成三個部分。 第一部分是探討三級運算放大器的設計。包含利用電流重複使用的技巧，來達到低功率消耗的要求，改善了傳統巢狀米勒補償方式的缺點，此電路以0.35-微米標準金氧半製程製造，在效能與傳統巢狀米勒補償 (NMC) 方式差不多的情形下，所消耗的電流可達到原先的一半；另外一顆放大器則是使用負向主動回授技巧來設計，利用負向主動回授路徑來產生一個左半平面的零點，並藉由此零點所造成的相位增加來補償極點，而順向路徑則可用來得到較佳的頻率與暫態響應，此外，此電路只需要一顆補償電容且相較於巢狀米勒補償並沒有額外電晶體的增加。這個電路是以0.18-微米標準金氧半製程製造。 第二部分探討參考電壓電路的設計。利用自我偏壓的電路作為主電路電流源的來源，此偏壓電路可用來補償通道長度調變 (channel-length modulation) 所造成電流會隨著電壓源上升而上升的情形，尤其隨著製程的進步，通道長度不斷的縮短，也使得這種影響變的越來越大，此外，藉由電晶體操作在弱反轉區的特性，產生一個不隨溫度變化的參考電壓，我們以0.35-微米標準金氧半製程設計此一電路。 最後一部分在探討低壓降穩壓器的設計。此電路綜合了負向主動回授的補償技巧以及參考電壓電路，一方面利用負向主動回授路徑所產生的零點，補償系統中過多的極點，使得整個電路能維持穩定，另一方面則藉由參考電壓電路來產生一個不受電壓源及溫度影響的輸入電壓。

The thesis describes low-dropout regulator with negative active-feedback frequency compensation. It is divided into three parts. The first part of this thesis discusses three-stage operational amplifiers. Using current-reused technique fits the demand of low-power dissipation. It improves the shortcoming of the conventional Nested-Miller Compensation (NMC) skill. This circuit has been fabricated by TSMC 0.35-μm N-well CMOS process. Under almost the same performance of CRNMC and NMC amplifiers, the power dissipation is reduced to half of NMC amplifiers. Another three-stage op-amp is proposed by negative active-feedback frequency compensation (NAFFC) techniques. The compensation technique exploits the negative active–feedback path to create a left-half-plane (LHP) zero. By means of the LHP zero adding positive phase, it can cancel out the negative phase-shift pole. At the mean time, a feedforward path is added to the NAFFC amplifier to obtain the better frequency-domain and time-domain performance. Moreover, only one compensation capacitor is needed and no additional transistors are required with comparison to the nested-Miller compensation (NMC) topology. This circuit has been fabricated by TSMC 0.18-μm CMOS process. The second part of this work discusses how to implement the MOSFET-only voltage reference circuit. The current source of the core circuit mirrors the current coming from a self-biased circuit. This self-biased circuit can compensate the channel-length modulation effect where drain current is increased with supply voltage. Especially in the advanced process, the channel-length modulation effect is becoming more and more prominent when channel length is shorter. Moreover, by means of the characteristics of the subthreshold region, the reference voltage independent of temperature is obtained. This circuit has been implemented in TSMC 0.35-μm N-well CMOS process. The final part of this work presents the low-dropout (LDO) regulator. The circuit combines the negative active-feedback frequency compensation skill and the voltage reference circuit. In order to make certain the system is stable, using the negative active-feedback path creates a LHP zero to compensate the pole. And the voltage reference circuit generates the voltage independent of supply voltage and temperature. It is the input voltage of the LDO regulator.