單電子記憶體模擬之研究

Abstract

單電子元件是目前相當受重視的一個研究領域，並被認為極有可能取代傳統的元件，尤其是應用在記憶體這個龐大的市場上。本篇研究使用MOSES—根據蒙地卡羅模擬方法所設計的模擬軟體—來模擬多種單電子記憶體。包括flip-flop單電子記憶體、電子阱記憶體、背景電荷不相依記憶體以及旋轉門式架構的單電子記憶體。 除了上述元件的基本操作上的模擬外，在特性上也做了一番討論。對於flip-flop單電子記憶體的負載阻抗與記憶維持時間的關係曾做一番探討。電子阱記憶體在這篇論文裡是討論得比較多的，特別是在將之應用在單電子隨機存取記憶體上的相關問題。原始設計所存在的一些缺點，像是動作上的穩定性以及功率的消秏上，都有獲得改善。位元線、字線和Vg的電壓被調整到較省電，且又可正常運作的準位。接面數、溫度和Vg之間的關係在此也有分析。對於旋轉門式架構的單電子記憶體，clock wave的寬度會影響到元件的穩定性，最大波長藉由模擬定出，因此也可以知道此元件的最小工作頻率。

Single-electron device is currently an important field of study and is supposed to replace the conventional devices, especially in the huge market of memory. In this thesis, a simulation tool MOSES which is based on Monte Carlo simulation method is used to simulate several types of single-electron memories including single-electron flip-flop memory, electron trap memory, background-charge-independent memory and turnstile based single-electron memory. Besides the simulation of basic operation, the characterizations are also discussed in this work. The load resistance is discussed to improve the retention problem of single-electron flip-flop memory. The electron trap memory is discussed more detail in this thesis, especially for the application in the single-electron random-access memory. Several disadvantages of the original design like operation stability and power consumption have been improved. The voltages used for bit-lines, word-lines and Vg are modifies to have lower power consumption for all memory array. The correlations between junction number, temperature and Vg are also discussed. For the turnstile based single-electron memory, the width of clock wave correlates to the stability of this device. It is simulated to define the longest clock width. Therefore the restriction about working frequency of the turnstile based single-electron memory is obtained.