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dc.contributor.authorLu, Chi-Peien_US
dc.contributor.authorTsui, Bing-Yueen_US
dc.contributor.authorLuo, Cheng-Keien_US
dc.contributor.authorLin, Cha-Hsinen_US
dc.contributor.authorTzeng, Pei-Jeren_US
dc.contributor.authorWang, Ching-Chiunen_US
dc.contributor.authorTsai, Ming-Jinnen_US
dc.date.accessioned2014-12-08T15:10:28Z-
dc.date.available2014-12-08T15:10:28Z-
dc.date.issued2009en_US
dc.identifier.issn1099-0062en_US
dc.identifier.urihttp://hdl.handle.net/11536/8005-
dc.identifier.urihttp://dx.doi.org/10.1149/1.3054304en_US
dc.description.abstractIn this work, high-performance TiN metal nanocrystal nonvolatile memories using a p(+) poly-Si gate and a Al(2)O(3) blocking dielectric layer with trigate structure are fabricated on silicon-on-insulator substrate. Devices with moderate transistor performance and superior memory properties are demonstrated. A memory window as high as 5 V is achieved after Program/Ease (P/E) operation at +/- 10 V for 0.1 s, with only 18 and 33% charge loss at room temperature and at 85 degrees C after 10 years storage. Only +0.5 V window shift and almost no window narrowing after 10(5) P/E operations can be obtained. Furthermore, a device with larger nanocrystals has better P/E characteristics and superior retention performance. (C) 2008 The Electrochemical Society. [DOI: 10.1149/1.3054304] All rights reserved.en_US
dc.language.isoen_USen_US
dc.titleTrigate TiN Nanocrystal Memory with High-k Blocking Dielectric and High Work Function Gate Electrodeen_US
dc.typeArticleen_US
dc.identifier.doi10.1149/1.3054304en_US
dc.identifier.journalELECTROCHEMICAL AND SOLID STATE LETTERSen_US
dc.citation.volume12en_US
dc.citation.issue3en_US
dc.citation.spageH70en_US
dc.citation.epageH72en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000263154000025-
dc.citation.woscount3-
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