完整後設資料紀錄
DC 欄位語言
dc.contributor.author蔡毓通en_US
dc.contributor.authorYuh-Tong Tsaien_US
dc.contributor.author陳家富en_US
dc.contributor.authorChia-Fu Chenen_US
dc.date.accessioned2014-12-12T03:01:39Z-
dc.date.available2014-12-12T03:01:39Z-
dc.date.issued2006en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009375502en_US
dc.identifier.urihttp://hdl.handle.net/11536/80283-
dc.description.abstract當IC工業進入深次微米及奈米半導體製程時,隨著縮短產品上市時間的壓力,採用先進製程技術時,為降低設計成本及提升收益,良率是相當關鍵的因素。因此如何有效降低微影製程中所產生之缺陷密度與精準控制元件關鍵尺寸的微影圖形和不同層間之疊對一樣重要。 本論文之研究主要是探討半導體微影之顯影製程所產生的缺陷,經由分析缺陷產生的原因,有別於傳統之靜態顯影方式使用動態顯影方式改善常見的顯影缺陷,於顯影過程之覆液顯影時主要是要降低顯影過程之微小氣泡造成圖形顯影瑕疵,如光阻線橋接及接觸窗未開等;於顯影過程之超純水清洗時,提高清洗效率去除顯影時顯影廢液及光阻殘渣所產生在晶圓表面的微粒及回沾污染。由實驗數據顯示,動態覆液顯影可將晶圓的顯影缺陷晶粒數目由靜態覆液顯影的平均13.7個降至3.6個約有70%之改善效果,而動態清洗可將顯影後晶圓表面的微粒及回沾污染數目由靜態清洗的平均45個降至26個約有42%之改善效果。zh_TW
dc.description.abstractWith the mounting pressure of introducing product into market, using advanced processing technology for lowering design cost and increasing profit, the process yield is a crucial factor as IC industry enters deep sub-micron and nano processes. Therefore, how to effectively reduce the defect density generated in the lithography process and the precision control of the pattern in component critical dimension are equally important as the overlaying of different layers in. This thesis mainly focuses on the investigation of defects generated in the semiconductor developing process. Through the analysis of the cause of defects generated, the dynamic developing method is used, as opposed to the static developing method normally used, for the improvement of developing defects often seen in the process. During the developing process, the puddle developing is mainly for the reducing of micro bubbles, resulting in the graphical developing defects such as pattern bridging and missing contact hole, etc. During the DI water rinsing of developing process, the cleaning efficiency is increased to remove the developing solution and the photo-resist residues on the wafer and sticking back contamination. The experimental data shows that the number of defect die of wafer was lowered from the average 13.7 to 3.6 which is the 70% improved effect after the dynamic puddle development instead of the static puddle development. Moreover, the number of the particle on the wafer and sticking back contamination after developing was reduced from the average 45 to 26 which is the 42% improved effect after the dynamic rinse instead of the static rinse.en_US
dc.language.isozh_TWen_US
dc.subject微影zh_TW
dc.subject顯影製程zh_TW
dc.subject缺陷zh_TW
dc.subjectlithographyen_US
dc.subjectdevelop processen_US
dc.subjectdefecten_US
dc.title以動態顯影方式降低缺陷之研究zh_TW
dc.titleA study of reducing defect by using dynamic developing methoden_US
dc.typeThesisen_US
dc.contributor.department工學院半導體材料與製程設備學程zh_TW
顯示於類別:畢業論文