數位式直流轉直流切換降壓控制器設計

Abstract

近年來，由於可攜式電子產品的輕薄短小，除了電池使用外，定電壓和低漣波的穩壓晶片在電源電路設計上是必然的趨勢。對於傳統的類比穩壓晶片，當其電源電路的規格有所變動時，需要根據新的參數改變整個晶片的設計。然而，對數位式穩壓晶片，運用數位式控制調變技術，可用來提昇系統電路之性能。這種數位式控制調變技術使用比例積分微分補償器(PID)之原理為設計基礎，主要特點是系統的輸出電壓經過類比數位轉換器(ADC)成為迴授訊號，並與參考電壓的差值作為數位控制器的調變訊號，以獲得電力電子之高效率直流切換電壓轉換。

在本論文中，數位控制器的設計以可程式化邏輯閘陣列(FPGA)作為電路實現的架構，並透過電壓轉換器之系統電路來驗證所設計數位控制器之功能與效能。此控制器的設計有較大的動態輸入電壓範圍，輸出電壓固定在3.3V，最大輸出負載電流為1A，和最大功率轉換效率可達到85.7%。

In recent years, due to development of frivolous and small portable electronic products quickly, except use of the battery, a fixed-voltage and low-ripple voltage regulator in the power circuit design has already been the essential tendency. For a traditional analog voltage regulator, when the power circuit specification has been changed, it needs to redesign according to new parameters. For a digital voltage regulator, it is realized by the digital control modulation technique to promote the performance of the system circuit. This technique makes use of the proportion integral differential (PID) compensator as the basic foundation of system design.To obtain transformation of high-efficiency DC voltages, this thesis proposes a novel digital DC-DC switching buck controller. The controller output voltage is transferred to feedback signals via an analog to digital converter (ADC), and then the difference between the feedback signal and the reference voltage is regarded as a major modulation signal. In this thesis, design of the digital controller is implemented and verified by using the filed programmable gate array (FPGA). We demonstrate a system circuit which uses the penetration voltage drop called the buck voltage converter in order to verify the digital controller. The input voltage of the controller has wider ranges volts, and the output is fixed as 3.3 volts. Finally, the proposed design can achieve the maximum output load current of 1A and the power transformation rate of 85.7%.