標題: 金屬奈米點記憶特性及研究
The memory characterization and investigation of metal nanocrystal
作者: 陳德安
De-An Chan
羅正忠
邱碧秀
Jen-Chung Lou
Bi-shiou Chiou
電子研究所
關鍵字: 奈米點;功函數;nanocrystal;work function
公開日期: 2006
摘要: 早期非揮發性記憶體的製作,是採用整層的複晶矽的浮停閘(Floating Gate)結構,利用此層來當電子的儲存層,當電子由通道注入到這層浮停閘之後,會影響到元件的臨界電壓值(Threshold voltage),藉由判別臨界電壓的電壓值大小,即可定以邏輯的 “0” & “1” 狀態。但是,因為這種浮停閘結構為整層的半導體薄膜,在電子反覆的從穿遂氧化層進出這層浮停閘,會使得穿遂氧化層裂化以至於出現缺陷,當缺陷一產生之後,所有儲存的電子將會隨這這層缺陷而有了漏電路徑,導致所寫入的電子全部流失掉,無法達到記憶的效果。然而在不久的將來,會因為成本的考量,將元件尺寸縮小至奈米等級,如此一來浮停閘結構所能儲存的電子量也會隨之減少,以至於不足造成臨界電壓的漂移。而尺寸微縮的同時穿遂氧化層的厚度也會隨之減少,以至於此結構記憶體可靠度不佳,這種結構認為到元件微縮至奈米等級左右便是此浮停閘結構的極限。為了應付未來大容量記憶體的需求,科學家努力的研發各種可以取代之的非揮發性記憶體如PCM、FeRAM、MRAM等…… 而在這個過渡時期,如何利用現有的技術,帶領快閃記憶體(Flash Memory)在繼續的走過下一個世代。許多研究論文提出了利用半導體或金屬的奈米點來當作電子的儲存層。利用奈米點的好處是,各個奈米點之前被絕緣體所包圍,所以當穿遂氧化層產生缺陷後,電子不會全部流失掉,僅僅流失掉缺陷附近儲存的電子,所以可以進一步應付尺寸的微縮和增加電子的保存能力(retention)。降低穿遂氧化層厚度,使得可以減少操作電壓,增加電子寫入的效率。此外,利用金屬奈米點電晶體還有幾個好處,一個是他能擁有高的狀態密度,再來就是金屬較半導體有著更大的功函數,當電子注入到金屬奈米點之中後是儲存在較深層的能階中,它所看到的能障較高,不易因鄰近元件的操作造成擾動,預期也能提升電子的保存時間。再來,因為各個奈米點注入了電子後,會因為庫倫阻絕(Coulomb blockade)效應,所儲存的電子會排斥後續電子的寫入。故在低電壓操作模式下(例如讀取時),電子不易被寫入到奈米點內,也就是有比較少的讀取干擾,在辨別邏輯 “0” & “1” 上會較為容易。
In early time, manufacture the nonvolatile memory uses poly-silicon layer treated as electron storage layer named floating gate(FG). When electron inject to this layer from channel. That will be influence the threshold voltage. Two state threshold voltages constitute logic “0” & “1”. For FG structure, the oxide has a defect because of electron repeat impact during the write/erase cycle, all of the charge stored in FG will be lose. FG structure will have reliability problem when device scale down to nano-meter level. How can use existing technology leads flash memory to pass through the next generation in the continuation. Many research papers proposed the electron storage layer made by semi-conduct or metal nano-crystal. The benefit is that nano-crystal surrounded by dielectric. When oxide has defect merely lose the electron which nearby the defect stores up. So nano-crystal device can maintain good retention characteristics. Therefore may further deal with the aggressive size scale down, reduce tunneling oxide thickness, may reduce the operation voltage, the efficiency which the increase electron writes in. Otherwise metal nano-crystal has higher density of states, and the design freedom of engineering the work functions to optimize device characteristics. Coulomb blockade effect can effectively inhibit electron tunneling at low gate voltage and improve the flash memory array immunity to read disturbance, can easy recognize logic “0” & “1”.
URI: http://140.113.39.130/cdrfb3/record/nctu/#GT009411561
http://hdl.handle.net/11536/80475
顯示於類別:畢業論文


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