完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | 郭子筠 | en_US |
dc.contributor.author | Tzu-Yun Kuo | en_US |
dc.contributor.author | 張添烜 | en_US |
dc.contributor.author | Tian-Sheuan Chang | en_US |
dc.date.accessioned | 2014-12-12T03:02:43Z | - |
dc.date.available | 2014-12-12T03:02:43Z | - |
dc.date.issued | 2006 | en_US |
dc.identifier.uri | http://140.113.39.130/cdrfb3/record/nctu/#GT009411601 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/80515 | - |
dc.description.abstract | 隨著高解析數位電視時代的來臨,為了兼顧大且精緻的畫面,高壓縮率規格(H.264/AVC)是我們現行的解決方案。因為在視訊編碼上用了更多的壓縮技巧,它不僅可有效節省儲存媒體所需的空間,同時也可在現行的通訊環境下允許傳輸更高解析的畫面。但是伴隨著種種好處而來的,就是尤其在高畫值應用中極之龐大的運算量。 這篇論文提出了適用於高畫值H.264/AVC分素像素移動的快速演算法及其硬體架構。為了解決高畫值應用中的龐大計算時間,我們提出只搜尋六點的單一疊代快速演算法。這個單一疊代的演算法利用移動向量預測器來預估可能的分數移動向量,由此減少了88%的分數位移估測搜尋點數,並且讓分數位移估測的運算所需要的疊代次數減半;另外我們使用4x4哈達瑪轉換而非8x8哈達瑪轉換來作為價值函數的計算方式,以減少其運算量和大約75%的轉換裝置面積。拜快速演算法之賜,分數移動估測部分跟之前的研究相比,其架構可以減少20%的面積及增進40%的運算處理速度。 | zh_TW |
dc.description.abstract | With modern day advances in computer processing and multimedia applications, improvements in the area of image processing and video compression are analogous. Video compression allows the reduction of high-resolution video into a more compact memory space to thereby reduce storage and video processing resources. But the playback is the growth of computational complexity, especially in HD-sized application. This thesis presents a set of fast algorithm and VLSI architecture for HDTV-sized H.264 fractional motion estimation. To solve the long computational latency in HD-sized application, we propose to use the single iteration algorithm with only six search points. This single iteration method uses the information of motion vector predictor to predict the fractional motion vector and thereby reduces 88% search points and halves the cycle count of two iteration methods in previous approaches. Moreover, we propose to use 4x4 Hadamard instead of 8x8 Hadamard as cost function for H.264 high profiles without significant video quality loss and 75% area reduction of the transform unit. By these techniques, the resulted architecture can save 20% of area and provide over 40% of throughput improvement than the previous work, and is able to support HDTV applications. | en_US |
dc.language.iso | zh_TW | en_US |
dc.subject | 視訊 | zh_TW |
dc.subject | 編碼 | zh_TW |
dc.subject | 移動估測 | zh_TW |
dc.subject | H.264 | en_US |
dc.subject | AVC | en_US |
dc.subject | FME | en_US |
dc.subject | Motion Estimation | en_US |
dc.subject | video coding | en_US |
dc.subject | video compression | en_US |
dc.title | 適用於H.264/AVC分數像素移動估測之快速演算法與設計 | zh_TW |
dc.title | Fast Algorithm and Design for H.264/AVC Fractional-pel Motion Estimation | en_US |
dc.type | Thesis | en_US |
dc.contributor.department | 電子研究所 | zh_TW |
顯示於類別: | 畢業論文 |