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dc.contributor.author林宜興en_US
dc.contributor.author蔡嘉明en_US
dc.date.accessioned2014-12-12T03:03:05Z-
dc.date.available2014-12-12T03:03:05Z-
dc.date.issued2007en_US
dc.identifier.urihttp://140.113.39.130/cdrfb3/record/nctu/#GT009411684en_US
dc.identifier.urihttp://hdl.handle.net/11536/80598-
dc.description.abstract爆模式光接收器的類比前端電路包含爆模式轉阻放大器及爆模式限幅放大器,在多個用戶端資料上傳時,局端所接收到資料封包間的功率有極大的差異,所以需具備自動增益控制(AGC)及自動偏移電壓補償(AOC),另外,為了快速還原不同封包的資料,所以在不同封包轉換之間需具有重置機制,重置訊號對於爆模式傳輸非常重要,近年來被提出的方式為偵測轉阻放大器輸出端的資料遺失,然而由於轉阻放大器的增益太小,所以偵測訊號的遺失並不可靠,因限幅放大器具有較大的增益,將使訊號遺失的偵測更可靠,當重置訊號產生後,再適當的規劃自動增益控制及臨界電壓的取得,為了能更有效的將重置訊號的產生、自動增益控制及自動偏移電壓補償做整合,本篇論文設計了2.5Gb/s及10Gb/s爆模式光接收器,為了同時改善增益與頻寬的限制,第一顆晶片在限幅放大器加入了負阻抗補償,應用在2.5Gb/s資料傳輸上,採用台積電0.18μm CMOS製程,量測結果具有19dB動態範圍、93 dB□差動轉阻增益、-21dBm的靈敏度、1.55GHz的光頻寬及小於10ns的響應速度,在1.8V供應電壓下消耗146mW的功率,第二顆晶片轉阻放大器採用了光二極體電容消除及負電容補償,應用在10Gb/s資料傳輸上,採用台積電90nm CMOS製程,量測結果具有72 dB□差動轉阻增益、-13dBm的靈敏度及6GHz的光頻寬,在1.2V及3V供應電壓下消耗124mW的功率。zh_TW
dc.description.abstractThe analog front-end circuit of burst-mode optical receiver includes the burst-mode transimpedance amplifier (BM-TIA) and the burst-mode limiting amplifier (BM-LA). In the upstream traffic, the optical line terminal (OLT) which receives the data packets from multiple optical network units (ONUs) has very different power levels. Therefore, the burst-mode receiver needs automatic gain control (AGC) and automatic offset cancellation (AOC). Due to the transfer of different data packets, the receiver needs internal reset-creation mechanism. Nowadays, the most popular approach for internal reset creation is to detect the loss of signal (LOS) at the output of TIA during the guard time between data packets. However, the gain of the TIA is too small to guarantee reliable LOS detection. The internal reset signal created by the LA is more reliable due to the increased net gain. Once the reset signal is properly generated, automatic controls of both the gain and the decision threshold can be enabled in a pre-determined procedure. To enable a more efficient integration scheme for reset creation, AGC and AOC, this thesis presents two integrated single-chip burst-mode optical receivers. To improve gain and bandwidth at the same time, negative impedance compensation is adopted in the circuit design. The first one implements a 2.5Gb/s burst-mode optical receiver in TSMC 0.18μm CMOS technology. Measurement results achieve 19dB dynamic range, 93dB□ total differential transimpedance gain, -21dBm sensitivity, 1.55GHz optical bandwidth and fast response time of less than 10ns. This chip dissipates 146mW from a 1.8V supply. The other one implements a 10Gb/s burst-mode optical receiver employing a capacitance cancellation technique in TSMC 90nm CMOS technology. Measurement results achieve 72dB□ total differential transimpedance gain, -13dBm sensitivity and 6GHz optical bandwidth. This chip dissipates 124mW from 1.2V and 3V supply.en_US
dc.language.isozh_TWen_US
dc.subject爆模式光接收器zh_TW
dc.subject轉阻放大器zh_TW
dc.subject限幅放大器zh_TW
dc.subject內嵌重置zh_TW
dc.subject被動光纖網路zh_TW
dc.subjectBurst-Mode Optical Receiveren_US
dc.subjectTIAen_US
dc.subjectLAen_US
dc.subjectinternal reset creationen_US
dc.subjectPONen_US
dc.title適用於被動光網路系統之互補式金氧半製程內嵌重置爆模式光接收器zh_TW
dc.titleDesign of CMOS Burst-Mode Optical Receiver with Internal Reset Creation for PON Systemsen_US
dc.typeThesisen_US
dc.contributor.department電子研究所zh_TW
顯示於類別:畢業論文


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