應用於超寬頻及多通訊標準無線接收機之互補式金氧半低雜訊前端電路

Abstract

本篇論文主要探討達到寬頻同時雜訊及輸入阻抗匹配的低雜訊放大技術。在此針對傳統的Y-參數雜訊分析方式進行改良，發展出較為準確的雜訊分析式，並依此定出設計低雜訊放大器的最佳策略。在本論文中所提出之雙重電抗性迴授電路架構在配合LC梯狀阻抗匹配網路之後，可達成寬頻同時雜訊及輸入阻抗匹配的最佳低雜訊放大器之設計條件。其中電感性部分迴授電路可以以變壓器迴授電路方式實現，大幅降低所需的晶片面積。本技術應用在設計一個3–11-GHz超寬頻低雜訊放大器，以及一個2.4–5.4-GHz可程式帶限低雜訊放大器。在可程式帶限低雜訊放大器的應用中我們亦發展出電晶體及電感之切換電路技術。前者提供電路性能的可程式特性，後者提供超寬可調頻率範圍並有效維持一致的電路性能。 在低雜訊放大器之前，射頻收發切換器直接影響整體收發器的性能。在此發展出針對CMOS特性的電路設計技術以提高切換器的線性度及耐受度。所設計出的4.9–6.0-GHz收發切換器可達到+30dBm線性度以及低於1-dB的損耗。

The technique of low noise amplification with broadband simultaneous noise and impedance matching (BSNIM) was developed. The conventional noise theory for MOSFET devices is revised to be more accurate. Strategies are addressed how to achieve low noise amplifier design. A dual reactive feedback topology along with an LC ladder matching network was proposed for BSNIM realization. The inductive feedback was implemented with a transformer feedback to reduce the circuit form factor. This technique was utilized to develop a 3–11-GHz ultra-wideband (UWB) LNA and a 2.4–5.4-GHz reconfigurable band-selection LNA. In the latter work the techniques of transistor switching and shunt inductor switching were developed. The transistor switching provides reconfiguration of performance including gain, linearity, and power consumption. The inductor switching provides a wide frequency tuning range while the voltage gain is consistent within the tuning range. An RF T/R switch in front of LNA directly affects transceiver performance. Circuit design techniques were developed specifically for CMOS process to overcome the shortcoming of MOSFET when handling high power. In this thesis a 4.9–6.0-GHz T/R switch is demonstrated with sub-dB insertion loss and >30dBm power handling capability.