具輸入電流修飾與柔性切換特性的單級交流-直流轉換器

Abstract

本論文旨在發展出具新穎性的單級交流-直流轉換電路以提升整體效能並符合成本效益，這些設計都是基於減低諧波污染的前提下所設計的，並可滿足如IEC 61000-3-2等電流諧波標準規範。 一般使用升壓型輸入電流修飾設計的的單級交流-直流轉換器常見的問題包括：開關電流應力過大並帶來額外的開關功率損失，以及使用電壓隨耦功因修正技術造成的輸入線電流失真。我們除了使用主動箝位的電路設計外，較新穎部分的解決策略分別為：改讓升壓電感在開關截止時做充磁以減緩開關導通時的電流應力和功率損耗；以及，輸入電流修飾子電路配合輸入線電壓的瞬間值自動調整其充磁時間，使得升壓電感的充磁電流得以補償放磁電流所造成的非線性失真，以此設計，輸入側的電流-電壓曲線可得到近乎線性的關係。 另一個需要面對的關鍵問題則是儲能電容電壓應力過大。本論文對此提出一個新型的單級交流-直流轉換器，此架構使用一反馳式與順向式整合型電路作為直流-直流輸出調整器。在此架構中，反馳式與順向式子轉換器分別被操作在連續導通模式與非連續導通模式之下。因此，在輕載的情況下，藉由抑止反馳式並維持順向式的正常運作即可利用非連續導通模式的輸出特性有效地抑制儲能電容電壓，並能保證在各種工作情況下都低於一般電容的最大電壓容忍值450 V。 本文中所提出的技術皆已在泛用型輸入電源（90–260 Vrms）的測試條件下實證過，實驗結果證明本文所提出的設計可有效地解決電流應力過大、電壓應力過大與轉換效率不佳的問題。

This dissertation presents innovative techniques and solutions to simultaneously improve the performance and satisfy the cost-effective consideration for the single-stage input current shaping (S2ICS) AC-DC converters. These designs are based on the consideration for limiting the line current harmonics, especially for meeting the stringent current harmonic regulations, such as IEC 61000-3-2. For general S2ICS converters employing boost-type input current shaping (ICS) cells, these circuits usually suffer from the relatively high switch current stress and line current waveform distortion caused by the voltage-follower control. To remedy these drawbacks, this dissertation presents a novel ICS technique for S2ICS converters. Unlike the conventional single-stage designs, the proposed ICS scheme is intentionally arranged to be charged in the duty-off time. With this design, the switch current stress in the duty-on time is significantly mitigated and accordingly the power loss is reduced. Moreover, this design produces AC modulation effect on the charging time of the ICS cell so that the waveforms of the average charging current and average discharging current of the boost inductor can compensate each other automatically. Consequently, the input i-v curve has nearly linear relationship. Another key issue of the S2ICS technique is the high bulk capacitor voltage stress. This dissertation also presents a novel S2ICS converter employing flyback-forward topology as the downstream DC-DC cell. In the proposed topology, the flyback and forward sub-converters are operated in CCM and DCM, respectively. Thus, by deactivating the flyback sub-converter and keeping the forward sub-converter supplying the output power, the bulk capacitor voltage at light load condition can be effectively suppressed and reliably maintained below the 450 V tolerance of commercially available electrolytic capacitors. All the proposed techniques have been verified by prototype circuits under universal line voltage condition (90–260 Vrms). Experimental results show that the proposed designs can effectively address the main issues including high current stress, high voltage stress, and low conversion efficiency.