金奈米粒子和硒化鎘量子點於非揮發性記憶體元件電荷捕獲中心之研究

Abstract

近幾年金屬奈米粒子作為記憶體的浮動閘極，已經受到許多研究團隊的研究。金屬奈米粒子作為浮動閘極材料選擇的主要優點是其具有較高的功函數、較多的電荷捕捉狀態(Charge trap state)。 在本篇論文中，我們使用電子束直寫(E-beam direct write)製造矽奈米線(Silicon nanowire)，並利用竟電力的方式自我組裝金奈米粒子(大約15奈米)和鎘化硒奈米粒子(大約五奈米)作為元件的浮動閘極(Floating gates)，本論文成功的研製出金屬奈米粒子(金奈米粒子)加上半導體奈米粒子(鎘化硒量子點)的非揮發浮動閘極記憶體(AuNPs/CdSeNPs Nonvolatile floating-gate memory)。 使用金奈米粒子加上鎘化硒奈米粒子作為非揮發浮動閘極，比單獨使用金和鎘化硒奈米粒子的記憶體，有更大的記憶窗(臨界電壓偏移)，而且在次臨界斜率(Subthreshold slope )、開關電流比(On/off current ratio)和記憶時間(Retention time)都有比較好的表現。另外，在金奈米粒子加上鎘化硒量子點(Au NPs+CdSe Qdots)、金奈米粒子(Au NPs)和鎘化硒量子點(CdSe Qdots)個別系統的電荷捕捉機制也利用能帶圖加以說明。

In recent years, metal nanoparticles (NPs) floating gate memory has already been attracted a lot of attention of research teams worldwide. The metal nanoparticle owns many properties like high work function and high charge trapping states as compared to semiconductor materials, which make it one of the best candidate materials as charge trapping centers in flash memory device applications. In this thesis, we adopted the e-beam lithography to define silicon nanowire and combined with self-assembly technique of Au nanoparticle and CdSe quantum dots to fabricate nonvolatile floating-gate silicon nanowire memory devices. The nonvolatile memory devices when using Au/CdSe as charge trapping centers have largest memory windows( ΔVth), better subthreshold slope (SS), longer retention time and largest on/off current ratio than those of the nonvolatile floating-gate memory devices with only Au nanoparticles or CdSe quantum dots as floating gates. The charge trapping mechanisms of these three different systems, Au nanoparticles, CdSe quantum dots and Au/CdSe, are also demonstrated using the energy band diagrams.