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dc.contributor.authorZan, Hsiao-Wenen_US
dc.contributor.authorWang, Kuang-Mingen_US
dc.date.accessioned2014-12-08T15:10:58Z-
dc.date.available2014-12-08T15:10:58Z-
dc.date.issued2008-09-01en_US
dc.identifier.issn0741-3106en_US
dc.identifier.urihttp://dx.doi.org/10.1109/LED.2008.2001396en_US
dc.identifier.urihttp://hdl.handle.net/11536/8405-
dc.description.abstractIn this letter, the resistance of the lightly doped drain (LDD) region in n-channel polycrystalline-silicon thin-film transistors (poly-Si TFTs) was analyzed. It was found that the LDD resistance was composed of an LDD-length-dependent part and a gate-bias-dominant part. The latter was located next to the gate edge and was governed by the channel extension phenomenon with an extended length of around 0.55 mu m under a 10-V gate bias. The current density distribution simulated by Silvaco ATLAS supported this severe fringing field effect. The influences of the gate bias, LDD doping level, gate oxide thickness, and LDD length on the channel extension are also investigated with Silvaco ATLAS simulation. This letter is the first report of long channel extensions in the LDD region of poly-Si TFTs. The result may significantly influence the device model in the short channel regime.en_US
dc.language.isoen_USen_US
dc.subjecteffective channel lengthen_US
dc.subjectlightly doped drain (LDD)en_US
dc.subjectparasitic resistanceen_US
dc.subjectpolycrystalline-silicon thin-film transistor (poly-Si TFT)en_US
dc.titleThe channel length extension in poly-Si TFTs with LDD structureen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/LED.2008.2001396en_US
dc.identifier.journalIEEE ELECTRON DEVICE LETTERSen_US
dc.citation.volume29en_US
dc.citation.issue9en_US
dc.citation.spage1034en_US
dc.citation.epage1036en_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.department顯示科技研究所zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
dc.contributor.departmentInstitute of Displayen_US
dc.identifier.wosnumberWOS:000259573400020-
dc.citation.woscount2-
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