Design of low-voltage CMOS low-noise amplifier with image-rejection function

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DC 欄位	值	語言
dc.contributor.author	Wei, L. -S.	en_US
dc.contributor.author	Wu, H. -I.	en_US
dc.contributor.author	Jou, C. F.	en_US
dc.date.accessioned	2014-12-08T15:11:09Z	-
dc.date.available	2014-12-08T15:11:09Z	-
dc.date.issued	2008-07-31	en_US
dc.identifier.issn	0013-5194	en_US
dc.identifier.uri	http://dx.doi.org/10.1049/el:20081246	en_US
dc.identifier.uri	http://hdl.handle.net/11536/8549	-
dc.description.abstract	A new design is presented that combines a low-noise amplifier (LNA) with an on-chip. lter instead of external. lter to eliminate image signal based on TSMC 0.18 mu m CMOS technology. The fully integrated 5.9 GHz LNA exhibits 15.2 dB gain, 3.2 dB noise figure, better than -15 dB input and output return loss, and -27 dB image rejection. The circuit operates at a supply voltage of 1 V and consumes only 6.1 mW power.	en_US
dc.language.iso	en_US	en_US
dc.title	Design of low-voltage CMOS low-noise amplifier with image-rejection function	en_US
dc.type	Article	en_US
dc.identifier.doi	10.1049/el:20081246	en_US
dc.identifier.journal	ELECTRONICS LETTERS	en_US
dc.citation.volume	44	en_US
dc.citation.issue	16	en_US
dc.citation.spage	977	en_US
dc.citation.epage	978	en_US
dc.contributor.department	電信工程研究所	zh_TW
dc.contributor.department	Institute of Communications Engineering	en_US
dc.identifier.wosnumber	WOS:000258593900022	-
dc.citation.woscount	0	-
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