標題: | Impact of MOSFET gate-oxide reliability on CMOS operational amplifier in a 130-nm low-voltage process |
作者: | Ker, Ming-Dou Chen, Jung-Sheng 電機學院 電子工程學系及電子研究所 College of Electrical and Computer Engineering Department of Electronics Engineering and Institute of Electronics |
關鍵字: | analog circuit;dielectric breakdown;gate-oxide reliability;MOSFETs;operational amplifier |
公開日期: | 1-Jun-2008 |
摘要: | The effect of the MOSFET gate-oxide reliability on operational amplifier is investigated with the two-stage and folded-cascode structures in a 130-nm low-voltage CMOS process. The test operation conditions include unity-gain buffer (close-loop) and comparator (open-loop) configurations under the de stress, ac stress with dc offset, and large-signal transition stress. After overstress, the small-signal parameters, such as small-signal gain, unity-gain frequency, and phase margin, are measured to verify the impact of gate-oxide reliability on circuit performances of the operational amplifier. The gate-oxide reliability in the operational amplifier can be improved by the stacked configuration under small-signal input and output application. The impact of soft and hard gate-oxide breakdowns on operational amplifiers with two-stage and folded-cascode structures has been analyzed and discussed. The hard breakdown has more serious impact on the operational amplifier. |
URI: | http://dx.doi.org/10.1109/TDMR.2008.922016 http://hdl.handle.net/11536/8742 |
ISSN: | 1530-4388 |
DOI: | 10.1109/TDMR.2008.922016 |
期刊: | IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY |
Volume: | 8 |
Issue: | 2 |
起始頁: | 394 |
結束頁: | 405 |
Appears in Collections: | Articles |
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