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dc.contributor.authorChang, Chia-Wenen_US
dc.contributor.authorWu, Tin-Weien_US
dc.contributor.authorWang, Tong-Yien_US
dc.contributor.authorChang, Che-Lunen_US
dc.contributor.authorLee, Jam-Wemen_US
dc.contributor.authorLei, Tan-Fuen_US
dc.date.accessioned2014-12-08T15:11:25Z-
dc.date.available2014-12-08T15:11:25Z-
dc.date.issued2007en_US
dc.identifier.isbn978-7-5617-5228-9en_US
dc.identifier.urihttp://hdl.handle.net/11536/8767-
dc.description.abstractPolycrystalline silicon thin-film transistors (poly-Si TFTs) with fluorinated silicate glass (FSG) inter-layer dielectric (ILD) passivation layer were proposed and demonstrated in this study. The presence of outdiffused fluorine atoms from FSG layer can eliminate Si dangling bonds at the grain boundaries near the drain side. The proposed short channel poly-Si TFTs with FSG ILD passivation have a slightly improved on-current, a obviously suppressed serious kink-effect, and a remarkably reduced off-leakage current than those with undoped SiO2 ILD passivation. Furthermore, the incorporation of fluorine atoms in poly-Si film can also form stronger Si-F bonds at drain side to enhance the immunity to hot carrier stress. Besides, the proposed TFTs structure is simple, low cost, and process compatible with present TFTs manufacturing technology.en_US
dc.language.isoen_USen_US
dc.subjectfluorinated silicate glass (FSG)en_US
dc.subjectfluorine ion implantationen_US
dc.subjectthin-film transistors (TFTs)en_US
dc.titlePerformance and reliability improvement for poly-Si TFTs using fluorinated silicate glass inter-layer-dielectric passivationen_US
dc.typeProceedings Paperen_US
dc.identifier.journalAD'07: Proceedings of Asia Display 2007, Vols 1 and 2en_US
dc.citation.spage1229en_US
dc.citation.epage1232en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000248022601028-
Appears in Collections:Conferences Paper