單晶片系統驗證之核心技術開發---總計畫(III)

Full metadata record

DC Field	Value	Language
dc.contributor.author	周景揚	en_US
dc.contributor.author	JOU JING-YANG	en_US
dc.date.accessioned	2014-12-13T10:28:27Z	-
dc.date.available	2014-12-13T10:28:27Z	-
dc.date.issued	2007	en_US
dc.identifier.govdoc	NSC96-2220-E009-007	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/88336	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=1463634&docId=262304	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	單晶片系統驗證之核心技術開發---總計畫(III)	zh_TW
dc.title	Core Technologies for SoC Verification(III)	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系及電子研究所	zh_TW
Appears in Collections:	Research Plans