標題: | Iridium Nanocrystal Thin-Film Transistor Nonvolatile Memory with Si(3)N(4)/SiO(2) Stack of Asymmetric Tunnel Barrier |
作者: | Wang, Terry Tai-Jui Lu, Tien-Lin Wu, Chien-Hung Liu, Yu-Cheng Hung, Shih-Wei Hsieh, Ing-Jar Kuo, Cheng-Tzu 材料科學與工程學系 Department of Materials Science and Engineering |
公開日期: | 1-五月-2011 |
摘要: | Iridium nanocrystals (Ir-NCs) lying on the Si(3)N(4)/SiO(2) tunneling layer have been demonstrated and Ir-NC-assisted thin-film transistor nonvolatile memory devices were successfully developed. Results show that Ir-NCs with a number density of similar to 6 x 10(11) cm(-2) and a particle diameter of 4 to 12 nm can successfully be fabricated as charge trapping centers. Owing to the asymmetric SiO(2)/Si(3)N(4) tunneling layer that increases programming/erasing efficiency, a significant memory window of 5.5 V has potential to be applied to multibit memory devices. Furthermore, after 10(4) s, the memory window is still about 4.0 V in logic states. (C) 2011 The Japan Society of Applied Physics |
URI: | http://dx.doi.org/10.1143/JJAP.50.05EF03 http://hdl.handle.net/11536/8918 |
ISSN: | 0021-4922 |
DOI: | 10.1143/JJAP.50.05EF03 |
期刊: | JAPANESE JOURNAL OF APPLIED PHYSICS |
Volume: | 50 |
Issue: | 5 |
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顯示於類別: | 期刊論文 |