完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, W. B. | en_US |
dc.contributor.author | Shie, B. S. | en_US |
dc.contributor.author | Chin, Albert | en_US |
dc.date.accessioned | 2014-12-08T15:11:49Z | - |
dc.date.available | 2014-12-08T15:11:49Z | - |
dc.date.issued | 2011-04-01 | en_US |
dc.identifier.issn | 0741-3106 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/LED.2011.2106478 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/9072 | - |
dc.description.abstract | By applying laser annealing (LA) on both gate dielectrics and source/drain activation, the TaN/ZrO(2)/La(2)O(3)/SiO(2) on Ge n-MOSFETs shows a high gate capacitance density, a small n(+)/p-junction ideality factor of 1.10, a small subthreshold swing (SS) of 106 mV/dec, and a good high-field mobility of 285 or 340 cm(2)/V . s after gate leakage correction at 1 MV/cm, at a small 0.95-nm equivalent oxide thickness (EOT). To the best of our knowledge, this is the first demonstration of significantly high gate capacitance in MOSFETs by LA. This is also the highest 1-MV/cm mobility at the smallest EOT of Ge n-MOSFETs and better than the SiO(2)/Si universal mobility. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | Annealing | en_US |
dc.subject | gate dielectric | en_US |
dc.subject | Ge | en_US |
dc.subject | high-kappa | en_US |
dc.subject | laser | en_US |
dc.title | Higher Gate Capacitance Ge n-MOSFETs Using Laser Annealing | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/LED.2011.2106478 | en_US |
dc.identifier.journal | IEEE ELECTRON DEVICE LETTERS | en_US |
dc.citation.volume | 32 | en_US |
dc.citation.issue | 4 | en_US |
dc.citation.spage | 449 | en_US |
dc.citation.epage | 451 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000288664800007 | - |
dc.citation.woscount | 9 | - |
顯示於類別: | 期刊論文 |