完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Hsieh, Chun-Yu | en_US |
dc.contributor.author | Huang, Hong-Wei | en_US |
dc.contributor.author | Chen, Ke-Horng | en_US |
dc.date.accessioned | 2014-12-08T15:11:51Z | - |
dc.date.available | 2014-12-08T15:11:51Z | - |
dc.date.issued | 2011-04-01 | en_US |
dc.identifier.issn | 1063-8210 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TVLSI.2009.2038061 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/9089 | - |
dc.description.abstract | An ultra low-power, precise voltage reference using a switched-capacitor technique in 0.35-mu m CMOS is presented in this paper. The temperature dependence of the carrier mobility and channel length modulation effect can be effectively minimized by using 3.3 and 5V N-type transistors to operate in the saturation and subthreshold regions, respectively. In place of resistors, a precise reference voltage with flexible trimming capability is achieved by using capacitors. When the supply voltage is 1 V and the temperature is 80 degrees C, the supply current is 250 nA. The line sensitivity is 0.76%/V; the PSRR is -41 dB at 100 Hz and -17 dB at 10 MHz. Moreover, the occupied die area is 0.049 mm(2). | en_US |
dc.language.iso | en_US | en_US |
dc.subject | CMOS voltage reference | en_US |
dc.subject | nanocurrent | en_US |
dc.subject | switched-capacitor | en_US |
dc.title | A 1-V, 16.9 ppm/degrees C, 250 nA Switched-Capacitor CMOS Voltage Reference | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TVLSI.2009.2038061 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS | en_US |
dc.citation.volume | 19 | en_US |
dc.citation.issue | 4 | en_US |
dc.citation.spage | 659 | en_US |
dc.citation.epage | 667 | en_US |
dc.contributor.department | 電控工程研究所 | zh_TW |
dc.contributor.department | Institute of Electrical and Control Engineering | en_US |
dc.identifier.wosnumber | WOS:000288681400013 | - |
dc.citation.woscount | 4 | - |
顯示於類別: | 期刊論文 |