| 標題: | 對以智財單元為基系統晶片設計之驗證測試與診斷技術開發研究---子計畫II：以智財單元為基系統晶片設計之測試與可測試設計技術研究 Testing and Design for Testability for IP-Based SoC Design |
| 作者: | 李崇仁 國立交通大學電子工程學系 |
| 公開日期: | 2003 |
| 官方說明文件#: | NSC92-2220-E009-004 |
| URI: | http://hdl.handle.net/11536/92082 https://www.grb.gov.tw/search/planDetail?id=844248&docId=159990 |
| Appears in Collections: | Research Plans |
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