標題: | Integrated Batteryless Electron Timer |
作者: | Watanabe, Hiroshi Ushijima, Tomomi Hagiwara, Norio Okada, Chiomi Tanabe, Takeshi 電子工程學系及電子研究所 友訊交大聯合研發中心 Department of Electronics Engineering and Institute of Electronics D Link NCTU Joint Res Ctr |
關鍵字: | Batteryless;communication network;encryption;local trap;solid-state aging device (SSAD);timing device |
公開日期: | 1-Mar-2011 |
摘要: | From the viewpoint of information security, the semiconductor timing devices are reviewed, and a promising cell with floating gate (FG) is proposed as an integrated batteryless electron timer. The first issue is the difficulty in the timing precision, which is related to the trap-detrapping phenomena in the tunnel oxide between the FG and the silicon surface. The basic idea to resolve this issue is to monitor the trap-free cells among a plurality of prepared cells. The integrated batteryless electron timer is composed of a plurality of single-polysilicon-type solid-state aging devices that are connected in parallel. The first sample is fabricated in a standard complementary metal-oxide-semiconductor process, and the measurements clearly exhibit the first evidence that we succeeded to remove the trap-detrapping-related fluctuation in the ticking operation. The resultant secondary issues on the precision, i.e., the manufacturing fluctuation (subjecting to the central-limit theorem) and the temperature dependence, are also briefly discussed. |
URI: | http://dx.doi.org/10.1109/TED.2010.2096226 http://hdl.handle.net/11536/9245 |
ISSN: | 0018-9383 |
DOI: | 10.1109/TED.2010.2096226 |
期刊: | IEEE TRANSACTIONS ON ELECTRON DEVICES |
Volume: | 58 |
Issue: | 3 |
起始頁: | 792 |
結束頁: | 797 |
Appears in Collections: | Articles |
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