高性能混合訊號式介面積體電路---子計畫II---射頻電路之靜電放電防護技術與高速高低壓界面電路之研發(II)

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DC Field	Value	Language
dc.contributor.author	柯明道	en_US
dc.contributor.author	KER MING-DOU	en_US
dc.date.accessioned	2014-12-13T10:34:11Z	-
dc.date.available	2014-12-13T10:34:11Z	-
dc.date.issued	2003	en_US
dc.identifier.govdoc	NSC92-2215-E009-036	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/92566	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=873477&docId=167337	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	高性能混合訊號式介面積體電路---子計畫II---射頻電路之靜電放電防護技術與高速高低壓界面電路之研發(II)	zh_TW
dc.title	Development of On-Chip ESD Protection Technique for GHz RF Circuits and High-Speed Mixed-Voltage Interface Circuits(II)	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程研究所	zh_TW
Appears in Collections:	Research Plans

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