完整後設資料紀錄
DC 欄位語言
dc.contributor.authorDhananjayen_US
dc.contributor.authorCheng, Shiau-Shinen_US
dc.contributor.authorYang, Chuan-Yien_US
dc.contributor.authorOu, Chun-Weien_US
dc.contributor.authorChuang, You-Cheen_US
dc.contributor.authorWu, M. Chyien_US
dc.contributor.authorChu, Chih-Weien_US
dc.date.accessioned2014-12-08T15:12:10Z-
dc.date.available2014-12-08T15:12:10Z-
dc.date.issued2008-05-07en_US
dc.identifier.issn0022-3727en_US
dc.identifier.urihttp://dx.doi.org/10.1088/0022-3727/41/9/092006en_US
dc.identifier.urihttp://hdl.handle.net/11536/9340-
dc.description.abstractBottom gate and top contact thin film transistors were fabricated using In(2)O(3) thin films as active channel layers. Thin films of varying thicknesses in the range 5 - 20 nm were deposited on an SiO(2) gate dielectric by the thermal evaporation process in the presence of high purity oxygen. The results of atomic force microscopy show that all the films exhibit dense grain distribution with a root-mean-square roughness in the range 0.6-8.0 nm. Irrespective of the thickness of the channel layer, the on/off ratio of the device is 10(4). The channel mobility and resistivity were found to be a strong function of the thickness of the active layer. The Levinson model was used to calculate the trap density and the grain boundary mobility. The low processing temperature shows the possibility of utilizing these devices on flexible substrates such as polymer substrates.en_US
dc.language.isoen_USen_US
dc.titleDependence of channel thickness on the performance of In(2)O(3) thin film transistorsen_US
dc.typeArticleen_US
dc.identifier.doi10.1088/0022-3727/41/9/092006en_US
dc.identifier.journalJOURNAL OF PHYSICS D-APPLIED PHYSICSen_US
dc.citation.volume41en_US
dc.citation.issue9en_US
dc.citation.spageen_US
dc.citation.epageen_US
dc.contributor.department光電工程學系zh_TW
dc.contributor.departmentDepartment of Photonicsen_US
顯示於類別:期刊論文