完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chen, Ming-Jer | en_US |
dc.contributor.author | Lu, Li-Fang | en_US |
dc.date.accessioned | 2014-12-08T15:12:13Z | - |
dc.date.available | 2014-12-08T15:12:13Z | - |
dc.date.issued | 2008-05-01 | en_US |
dc.identifier.issn | 0018-9383 | en_US |
dc.identifier.uri | http://dx.doi.org/10.1109/TED.2008.919317 | en_US |
dc.identifier.uri | http://hdl.handle.net/11536/9375 | - |
dc.description.abstract | On the basis of a parabolic potential profile around the source-channel junction barrier of nanoscale MOSFETs, a new compact model is physically derived, which links the width of thermal energy kappa T-B layer (a critical zone in the context of the backscattering theory) to the geometrical and bias parameters of the devices. The proposed model is supported by experimental data and by a critical analysis of various simulation works presented in the literature. The only fitting parameter remains constant in a wide range of channel length (10-65 nm), gate voltage (0.4-1.2 V), drain voltage (0.2-1.2 V), and temperature (100 K-500 K). The confusing temperature-dependent issues in the open literature are straightforwardly clarified. | en_US |
dc.language.iso | en_US | en_US |
dc.subject | backscattering | en_US |
dc.subject | MOSFET | en_US |
dc.subject | nanometer | en_US |
dc.title | A parabolic potential barrier-oriented compact model for the kappa T-B layer's width in nano-MOSFETs | en_US |
dc.type | Article | en_US |
dc.identifier.doi | 10.1109/TED.2008.919317 | en_US |
dc.identifier.journal | IEEE TRANSACTIONS ON ELECTRON DEVICES | en_US |
dc.citation.volume | 55 | en_US |
dc.citation.issue | 5 | en_US |
dc.citation.spage | 1265 | en_US |
dc.citation.epage | 1268 | en_US |
dc.contributor.department | 電子工程學系及電子研究所 | zh_TW |
dc.contributor.department | Department of Electronics Engineering and Institute of Electronics | en_US |
dc.identifier.wosnumber | WOS:000255317900023 | - |
dc.citation.woscount | 8 | - |
顯示於類別: | 期刊論文 |