低功率低電壓數位及類比積體電路之晶片實現及設計法則(VI)

標題:	低功率低電壓數位及類比積體電路之晶片實現及設計法則(VI) Implementation and Methodology for Low Power/Low Voltage Digital and Analog Integrated Circuits(VI)
作者:	陳明哲 CHEN MING-JER 國立交通大學電子工程學系
公開日期:	2000
官方說明文件#:	NSC89-2215-E009-114
URI:	http://hdl.handle.net/11536/93765 https://www.grb.gov.tw/search/planDetail?id=583919&docId=109714
Appears in Collections:	Research Plans

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