深次微米互補式金氧半製程技術下之混合電壓輸出入界面電路與靜電放電防護電路的設計

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DC Field	Value	Language
dc.contributor.author	柯明道	en_US
dc.contributor.author	KER MING-DOU	en_US
dc.date.accessioned	2014-12-13T10:36:18Z	-
dc.date.available	2014-12-13T10:36:18Z	-
dc.date.issued	2000	en_US
dc.identifier.govdoc	NSC89-2215-E009-103	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/93852	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=583886&docId=109706	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.title	深次微米互補式金氧半製程技術下之混合電壓輸出入界面電路與靜電放電防護電路的設計	zh_TW
dc.title	Design of Mixed-Voltage I/O Interface Circuits and On-Chip ESD Protection Circuits in Sub-Quarter-Micron CMOS IC's	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學電子工程學系	zh_TW
Appears in Collections:	Research Plans

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APA	柯., & KER M. (2000). 深次微米互補式金氧半製程技術下之混合電壓輸出入界面電路與靜電放電防護電路的設計. https://www.grb.gov.tw/search/planDetail?id=583886&docId=109706.
Bibtex	@article{2000, title={深次微米互補式金氧半製程技術下之混合電壓輸出入界面電路與靜電放電防護電路的設計}, author={柯明道 and KER MING-DOU}, journal={https://www.grb.gov.tw/search/planDetail?id=583886&docId=109706}, year={2000}, url={https://ir.lib.nycu.edu.tw/handle/11536/93852?mode=full}, }