Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 陳盈安 | en_US |
| dc.date.accessioned | 2014-12-13T10:36:20Z | - |
| dc.date.available | 2014-12-13T10:36:20Z | - |
| dc.date.issued | 2000 | en_US |
| dc.identifier.govdoc | NSC89-2215-E009-120 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/93874 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=583945&docId=109720 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 對以智財單元為基系統晶片設計之驗證與測試技術開發研究---子計畫二：以智財為基系統晶片設計之功能驗證技術研究 | zh_TW |
| dc.title | Functional Verification Techniques for IP-Based SoC Design | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 國立交通大學資訊科學學系 | zh_TW |
| Appears in Collections: | Research Plans | |
Files in This Item:
If it is a zip file, please download the file and unzip it, then open index.html in a browser to view the full text content.
