Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 吳錦川 | en_US |
| dc.date.accessioned | 2014-12-13T10:37:02Z | - |
| dc.date.available | 2014-12-13T10:37:02Z | - |
| dc.date.issued | 1999 | en_US |
| dc.identifier.govdoc | NSC88-2215-E009-073 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/94339 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=418462&docId=74250 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.subject | 無線通訊 | zh_TW |
| dc.subject | 中頻電路 | zh_TW |
| dc.subject | 中頻收發器 | zh_TW |
| dc.subject | 鎖相迴路 | zh_TW |
| dc.subject | 混合式電路 | zh_TW |
| dc.subject | Wireless communication | en_US |
| dc.subject | IF circuit | en_US |
| dc.subject | IF transceiver | en_US |
| dc.subject | Phase-locked loop (PLL) | en_US |
| dc.subject | Mixed-mode circuit | en_US |
| dc.title | 高性能混合訊號積體電路與系統之設計與研製---子計畫III：無線通訊中頻電路設計(III) | zh_TW |
| dc.title | Wireless Communication IF Circuit Design (III) | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 交通大學電子工程系 | zh_TW |
| Appears in Collections: | Research Plans | |
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