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dc.contributor.author吳錦川en_US
dc.date.accessioned2014-12-13T10:37:02Z-
dc.date.available2014-12-13T10:37:02Z-
dc.date.issued1999en_US
dc.identifier.govdocNSC88-2215-E009-073zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/94339-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=418462&docId=74250en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.subject無線通訊zh_TW
dc.subject中頻電路zh_TW
dc.subject中頻收發器zh_TW
dc.subject鎖相迴路zh_TW
dc.subject混合式電路zh_TW
dc.subjectWireless communicationen_US
dc.subjectIF circuiten_US
dc.subjectIF transceiveren_US
dc.subjectPhase-locked loop (PLL)en_US
dc.subjectMixed-mode circuiten_US
dc.title高性能混合訊號積體電路與系統之設計與研製---子計畫III:無線通訊中頻電路設計(III)zh_TW
dc.titleWireless Communication IF Circuit Design (III)en_US
dc.typePlanen_US
dc.contributor.department交通大學電子工程系zh_TW
Appears in Collections:Research Plans


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