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dc.contributor.authorYang, Ming-Juien_US
dc.contributor.authorChien, Chao-Hsinen_US
dc.contributor.authorLu, Yi-Hsienen_US
dc.contributor.authorShen, Chih-Yenen_US
dc.contributor.authorHuang, Tiao-Yuanen_US
dc.date.accessioned2014-12-08T15:12:20Z-
dc.date.available2014-12-08T15:12:20Z-
dc.date.issued2008-04-01en_US
dc.identifier.issn0018-9383en_US
dc.identifier.urihttp://dx.doi.org/10.1109/TED.2008.916759en_US
dc.identifier.urihttp://hdl.handle.net/11536/9487-
dc.description.abstractIn this paper, we describe a systematic study of the electrical properties of low-temperature-compatible p-channel polycrystalline-silicon thin-film transistors (poly-Si TFTs) using HfO2 and HfSiOx high-kappa gate dielectrics. Because of their larger gate capacitance density, the TFTs containing the high-kappa gate dielectrics exhibited superior device performance in terms of higher I-on/I-off current ratios, lower subthreshold swings (SSs), and lower threshold voltages (V-th), relative to conventional deposited-SiO2, albeit with slightly higher OFF-state currents. The TFTs incorporating HfSiOx as the gate dielectric had ca. 1.73 times the mobility (mu(FE)) relative to that of the deposited-SiO2 TFTs; in contrast, the HfO2 TFTs exhibited inferior mobility. We investigated the mechanism for the mobility degradation in these HfO2 TFTs. The immunity of the HfSiOx TFTs was better than that of the HfO2 TFTs-in terms of their V-th shift, SS degradation, mu(FE) degradation, and drive current deterioration-against negative bias temperature instability stressing. Thus, we believe that HfSiOx, rather than HfO2, is a potential candidate for use as a gate-dielectric material in future high-performance poly-Si TFTs.en_US
dc.language.isoen_USen_US
dc.subjecthafnium silicate (HfSiOx)en_US
dc.subjecthigh dielectric constant (high-kappa)en_US
dc.subjectnegative bias temperature instability (NBTI)en_US
dc.subjectpolycrystalline-silicon thin-film transistors (poly-Si TFTs)en_US
dc.titleElectrical properties of low-temperature-compatible p-channel polycrystalline-silicon TFTs using high-kappa gate dielectricsen_US
dc.typeArticleen_US
dc.identifier.doi10.1109/TED.2008.916759en_US
dc.identifier.journalIEEE TRANSACTIONS ON ELECTRON DEVICESen_US
dc.citation.volume55en_US
dc.citation.issue4en_US
dc.citation.spage1027en_US
dc.citation.epage1034en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000254225500013-
dc.citation.woscount8-
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