A novel poly-Si nanowire TFT for nonvolatile memory applications

標題:	A novel poly-Si nanowire TFT for nonvolatile memory applications
作者:	Hsu, Hsin-Hwei Lin, Horng-Chih Huang, Jian-Fu Huang, Tiao-Yuan 電子工程學系及電子研究所 Department of Electronics Engineering and Institute of Electronics
公開日期:	2008
摘要:	A novel ploy-Si nanowire TFT-SONOS device configured with independent double-gate structure was fabricated and characterized. The electrical characteristics including programming and erasing properties were studied. Adding an adequate top-gate bias was found to improve the programming efficiency, resulting in larger memory window.
URI:	http://hdl.handle.net/11536/952
ISBN:	978-1-4244-1656-1
期刊:	MTTD 2007 TAIPEI: PROCEEDINGS OF 2007 IEEE INTERNATIONAL WORKSHOP ON MEMORY TECHNOLOGY, DESIGN, AND TESTING (MTD '07)
起始頁:	55
結束頁:	56
顯示於類別：	會議論文