複雜指令集超純量處理機架構技術之研究

完整後設資料紀錄

DC 欄位	值	語言
dc.contributor.author	曾建超	en_US
dc.contributor.author	TSENG CHIEN-CHAO	en_US
dc.date.accessioned	2014-12-13T10:38:51Z	-
dc.date.available	2014-12-13T10:38:51Z	-
dc.date.issued	1996	en_US
dc.identifier.govdoc	NSC85-2213-E009-074	zh_TW
dc.identifier.uri	http://hdl.handle.net/11536/95786	-
dc.identifier.uri	https://www.grb.gov.tw/search/planDetail?id=230971&docId=42041	en_US
dc.description.sponsorship	行政院國家科學委員會	zh_TW
dc.language.iso	zh_TW	en_US
dc.subject	複雜指令集	zh_TW
dc.subject	超純量	zh_TW
dc.subject	分歧預測	zh_TW
dc.subject	Complex instruction set	en_US
dc.subject	Superscalar	en_US
dc.subject	Branch prediction	en_US
dc.subject	Instruction issuecomplete	en_US
dc.subject	Pipeline	en_US
dc.subject	Precise interrupt	en_US
dc.title	複雜指令集超純量處理機架構技術之研究	zh_TW
dc.title	Study of Architectural Support for Superscalar CISC Processors	en_US
dc.type	Plan	en_US
dc.contributor.department	國立交通大學資訊工程學系	zh_TW
顯示於類別：	研究計畫