标题: 下世代行动通讯之通道编解码晶片设计
Channel Coding Chip Design for Next-Generation Mobile Comminications
作者: 张锡嘉
Chang Hsie-Chia
国立交通大学电子工程学系及电子研究所
关键字: LTE-Advanced;通道编码;涡輪码;低密度奇偶校验码;低密度奇偶校验回旋码;LTE-Advanced;Channel Coding;Turbo Codes;LDPC Codes;LDPC-CC Codes
公开日期: 2014
摘要: 在行动通讯系统裡,高运算量的通道编解码模组往往扮演相当关键的角色,不仅要达到传
输需求的高吞吐量,也必须降低伴随而來的功率消耗,以提供具有技术竞争力的解决方案。
近年來,涡輪码(Turbo codes)与低密度奇偶校验码(Low-Density Parity-Check codes,简
称LDPC codes)因为解码效能优異,兩者皆被广泛使用于各种通讯规格裡;但由于低密度
奇偶校验码难以提供弹性编码率与可变码字长度,第三代手机通讯标准在release-8(又称为
3GPP-LTE)版本后已选择涡輪码作为通道编码的唯一选择。而为满足现代人使用手持行动
装置的高网路传输速度要求,近期持续制定release-9、release-10(又称为LTE-Advanced)
更进一步将下行(Downlink)峰值速率提升到100Mbps~1Gbps,涡輪码要同时达到1Gbps
吞吐量并降低功率消耗,仍是重大挑战。
据此,本计划除进行涡輪码的高速低功耗晶片设计,也将从低密度奇偶校验回旋码
(Low-Density Parity-Check Convolutional codes,简称LDPC-CC)着手,融合低密度奇偶校
验码的优異解码效能以及回旋码的弹性编码长度等优点,改善其高解码延迟、低平行度、
偏低解码速率等缺点,以设计出超越1Gbps 吞吐量、功率消耗小于0.2 瓦特,适用在下世代
行动通讯系统的通道编解码器,并期许相关研究成果能得到ISSCC 与JSSC 等論文肯定。
The channel coding module with high computation load plays an important role in wireless
communication system. The competitive design must not only meet the system requirements in
high throughput but also improve the energy efficiency. In the past decade, Turbo codes and
LDPC codes are widely adopted in various kinds of communication specifications for excellent
error-correcting performance. However, the release-8 version of 3GPP-LET mobile
communication standards no longer considered LDPC for the difficulties on providing flexible
code-rates and variable codeword length. Moreover, in order to satisfy high-speed transmission
requirements on various hand-held mobile devices, the latest release-9 and release-10 version
(LTE-Advance) further raises the peak rate of downlink to 100Mbps~1Gbps. How to achieve
1Gbps throughput, to provide flexible coding rates, and to reduce the power consumption is still
very challenging to Turbo code design.
Accordingly, this research project will focus on both Turbo codes and LDPC convolutional
codes (LDPC-CC) which combine the excellent error-correcting performance similar to LDPC
block codes and variable data frame size similar to convolutional codes. The drawbacks of
LDPC-CC including the long decoding latency, low parallelism, and low to medium decoding
throughput will be conquered. In addition to discussion and analysis of the above research issues,
this project will also employ the low power and low cost design flow to eventually design an error
correcting encoder/decoder for LTE-Advance system with over 1Gbps throughput and less than
0.2W power consumption. The related work will be submitted to ISSCC and JSSC.
官方说明文件#: NSC101-2628-E009-013-MY3
URI: http://hdl.handle.net/11536/96163
https://www.grb.gov.tw/search/planDetail?id=8110528&docId=429664
显示于类别:Research Plans