Full metadata record
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 李崇仁 | en_US |
| dc.date.accessioned | 2014-12-13T10:39:49Z | - |
| dc.date.available | 2014-12-13T10:39:49Z | - |
| dc.date.issued | 1995 | en_US |
| dc.identifier.govdoc | NSC84-2215-E009-060 | zh_TW |
| dc.identifier.uri | http://hdl.handle.net/11536/96844 | - |
| dc.identifier.uri | https://www.grb.gov.tw/search/planDetail?id=160988&docId=26778 | en_US |
| dc.description.sponsorship | 行政院國家科學委員會 | zh_TW |
| dc.language.iso | zh_TW | en_US |
| dc.title | 超大型積體電路設計與計算機自動輔助設計---子計畫四：超大型積體電路之合成、測試與可測試設計 | zh_TW |
| dc.title | VLSI Synthesis, Testing and Design for Testability | en_US |
| dc.type | Plan | en_US |
| dc.contributor.department | 國立交通大學電子工程學系 | zh_TW |
| Appears in Collections: | Research Plans | |
