標題: Transient-induced latchup in CMOS integrated circuits due to electrical fast transient (EFT) test
作者: Yen, Cheng-Cheng
Ker, Ming-Dou
電機學院
College of Electrical and Computer Engineering
公開日期: 2007
摘要: The transient-induced latchup (TLU) in CMOS ICs under electrical fast transient (EFT) test has been investigated by experimental verification. With positive and negative voltage pulses under EFT test, the TLU can be triggered on in CMOS ICs with the parasitic pnpn structure. The physical mechanism of TLU in CMOS ICs has been developed with experimental verification in time domain. All the experimental evaluations have been verified with the silicon-controlled rectifier (SCR) test structure fabricated in a 0.18-mu m CMOS technology.
URI: http://hdl.handle.net/11536/9701
ISBN: 978-1-4244-1014-9
期刊: IPFA 2007: PROCEEDINGS OF THE 14TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS
起始頁: 253
結束頁: 256
Appears in Collections:Conferences Paper