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dc.contributor.author林呈祥en_US
dc.date.accessioned2014-12-13T10:40:11Z-
dc.date.available2014-12-13T10:40:11Z-
dc.date.issued1994en_US
dc.identifier.govdocNSC83-0404-E002-025zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/97237-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=109767&docId=17467en_US
dc.description.sponsorship行政院國家科學委員會zh_TW
dc.language.isozh_TWen_US
dc.title超大型積體電路電腦網路輔助設計系統---子計畫三:非同步電路設計zh_TW
dc.titleDesign and Synthesis of Self-Timed Circuits (II)en_US
dc.typePlanen_US
dc.contributor.department國立台灣大學電機工程學研究所zh_TW
Appears in Collections:Research Plans