標題: | A simple method for sub-100 nm pattern generation with I-line double-patterning technique |
作者: | Tsai, Tzu-I Lin, Horng-Chih Jian, Min-Feng Huang, Tiao-Yuan Chao, Tien-Sheng 電子物理學系 電子工程學系及電子研究所 Department of Electrophysics Department of Electronics Engineering and Institute of Electronics |
公開日期: | 1-五月-2010 |
摘要: | We have developed a simple method adopting double-patterning technique to extend the I-line stepper limit for the sub-100 nm poly-Si pattern generation in this work. Through in-line and cross-sectional scanned electron microscopic analyses of the generated patterns, we confirmed the feasibility of the double-patterning technique for the fabrication of nano-scale devices. Resolution capability of this technique has been confirmed to be at least 100 nm, which is much superior to the resolution limit of conventional I-line lithography. This approach has also been applied for fabricating p-channel metal-oxide-semiconductor field-effect transistors. Excellent device characteristics were verified. (C) 2010 Elsevier Ltd. All rights reserved. |
URI: | http://dx.doi.org/10.1016/j.microrel.2010.01.019 http://hdl.handle.net/11536/9899 |
ISSN: | 0026-2714 |
DOI: | 10.1016/j.microrel.2010.01.019 |
期刊: | MICROELECTRONICS RELIABILITY |
Volume: | 50 |
Issue: | 5 |
起始頁: | 584 |
結束頁: | 588 |
顯示於類別: | 會議論文 |