次世代智慧室內無線五十億級位元傳輸率之基頻傳收機技術應用與隨機運算IP-子計畫三：針對通訊數位訊號處理器從功能單元層級到系統層級之可靠性驅策的隨機性合成技術( I )

Abstract

隨著製程技術的發展，電路設計也越來越複雜，設計者必須依賴電子設計自動化軟體的輔助。另一方面，隨著製程技術的演進，電路受到製程變異的影響也越來越大。在過去的電子設計自動化當中，晶片設計的流程中通常沒有考慮製程變異，而是單純的以最糟的情形去分析晶片的效能，導致所設計的晶片可能過於悲觀。然而，如果能以隨機性的機率模型模擬晶片實際生產時的變異性，例如使用統計靜態時序分析 (SSTA)的技巧，在設計晶片時，將能在效能與良率之間取得最佳的平衡。在這個計畫裡，我們期望在電子設計流程中，除了考慮面積最小化外，還要納入製程變異的考慮。在第一年的目標中，我們針對高速通訊系統中常用之訊號處理系統如有限脈衝響應濾波器(FIR filter)，發展考慮最長路徑延遲最佳化之多常數乘法器(MCM)自動合成器。我們用整數線性規畫法(ILP)和二進位共用項分享技術來達到多重常數乘法器的延遲和面積最佳化，並且同時地利用進位前瞻加法器(CLA)與進位儲存加法器(CSA)來實現加法架構。且我們的方法會找出所有可能的二進位共用項來與目標配對。在實驗部分，我們的方法與先前文獻的作法相比，在面積與延遲上都有更好的表現。

Due to the growing design complexity in nowadays digital system, designers rely on electronic design automation (EDA) tools more. Meanwhile, the process variation has been proven to be a critical problem in advanced technologies. Traditionally, variation problems were not considered. The worst case timing was applied to estimate the chip performance in IC design. However, if we can apply the stochastic model for the process variation, for example, applying statistic static timing analysis (SSTA) for timing analyzing, we can obtain a better balance between chip performance and performance yield during chip design.In this project, we wish to apply the process variation consideration besides of area minimization. In the first year stage, our target is for the finite impulse response (FIR) filter in high speed communication systems. We will develop a multiple constant multiplier (MCM) with longest path delay minimization for these systems.We present an integer linear programming (ILP) based approach for delay and area-optimal binary subexpression sharing for MCM design which uses different adder architectures (i.e., carry look-ahead adder and carry save adder) simultaneously. The proposed method exploits patterns acquired from all possible symbols (also known as subexpressions) to match the target MCM design optimally. The experimental results show that the proposed algorithm can achieve significant performance improvement as compared with the prior art.