Optimized ONO thickness for multi-level and 2-bit/cell operation for wrapped-select-gate (WSG) SONOS memory

Abstract

In this paper, highly reliable wrapped-select-gate (WSG) silicon-oxide-nitride-oxide-silicon (SONOS) memory cells with multi-level and 2-bit/cell operation have been successfully demonstrated. The source-side injection mechanism for WSG-SONOS memory with different ONO thickness was thoroughly investigated. The different programming efficiencies of the WSG-SONOS memory under different ONO thicknesses are explained by the lateral electrical field extracted from the simulation results. Furthermore, multi-level storage is easily obtained, and good V(TH) distribution presented, for the WSG-SONOS memory with optimized ONO thickness. High program/erase speed (10 mu s/5 ms) and low programming current (3.5 mu A) are used to achieve the multi-level operation with tolerable gate and drain disturbance, negligible second-bit effect, excellent data retention and good endurance performance.