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公開日期標題作者
二月-2017A Flexible Geometric Mean Decomposition Processor for MIMO Communication SystemsTsai, Yu-Cheng; Chen, Chiao-En; Yang, Chia-Hsiang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic CMOS SoC for Real-Time Epileptic Seizure ControlChen, Wei-Ming; Chiueh, Herming; Chen, Tsan-Jieh; Ho, Chia-Lun; Jeng, Chi; Ker, Ming-Dou; Lin, Chun-Yu; Huang, Ya-Chun; Chou, Chia-Wei; Fan, Tsun-Yuan; Cheng, Ming-Seng; Hsin, Yue-Loong; Liang, Sheng-Fu; Wang, Yu-Lin; Shaw, Fu-Zen; Huang, Yu-Hsing; Yang, Chia-Hsiang; Wu, Chung-Yu; 電機資訊學士班; 電子工程學系及電子研究所; 生醫電子轉譯研究中心; Undergraduate Honors Program of Electrical Engineering and Computer Science; Department of Electronics Engineering and Institute of Electronics; Biomedical Electronics Translational Research Center
1-一月-2013A Fully Integrated 8-Channel Closed-Loop Neural-Prosthetic SoC for Real-Time Epileptic Seizure ControlChen, Wei-Ming; Chiueh, Herming; Chen, Tsan-Jieh; Ho, Chia-Lun; Jeng, Chi; Chang, Shun-Ting; Ker, Ming-Dou; Lin, Chun-Yu; Huang, Ya-Chun; Chou, Chia-Wei; Fan, Tsun-Yuan; Cheng, Ming-Seng; Liang, Sheng-Fu; Chien, Tzu-Chieh; Wu, Sih-Yen; Wang, Yu-Lin; Shaw, Fu-Zen; Huang, Yu-Hsing; Yang, Chia-Hsiang; Chiou, Jin-Chern; Chang, Chih-Wei; Chou, Lei-Chun; Wu, Chung-Yu; 交大名義發表; National Chiao Tung University
1-十二月-2014A Fully Integrated Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated PneumoniaChiu, Shih-Wen; Wang, Jen-Huo; Chang, Kwuang-Han; Chang, Ting-Hau; Wang, Chia-Min; Chang, Chia-Lin; Tang, Chen-Ting; Chen, Chien-Fu; Shih, Chung-Hung; Kuo, Han-Wen; Wang, Li-Chun; Chen, Hsin; Hsieh, Chih-Cheng; Chang, Meng-Fan; Liu, Yi-Wen; Chen, Tsan-Jieh; Yang, Chia-Hsiang; Chiueh, Herming; Shyu, Juyo-Min; Tang, Kea-Tiong; 電機資訊學士班; 電子工程學系及電子研究所; Undergraduate Honors Program of Electrical Engineering and Computer Science; Department of Electronics Engineering and Institute of Electronics
1-九月-2014A Fully Parallel LDPC Decoder Architecture Using Probabilistic Min-Sum Algorithm for High-Throughput ApplicationsCheng, Chung-Chao; Yang, Jeng-Da; Lee, Huang-Chang; Yang, Chia-Hsiang; Ueng, Yeong-Luh; 交大名義發表; 電機工程學系; National Chiao Tung University; Department of Electrical and Computer Engineering
2012Hardware-Efficient EVD Processor Architecture in FastICA for Epileptic Seizure DetectionShih, Yi-Hsin; Chen, Tsan-Jieh; Yang, Chia-Hsiang; Chiueh, Herming; 交大名義發表; National Chiao Tung University
1-一月-2011A Hardware-Efficient VLSI Architecture for Hybrid Sphere-MCMC DetectionYuan, Fang-Li; Yang, Chia-Hsiang; Markovic, Dejan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2018A Hardware-Scalable DSP Architecture for Beam Selection in mm-Wave MU-MIMO SystemsYeh, Chun-Yu; Chu, Ting-Chung; Chen, Chiao-En; Yang, Chia-Hsiang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2013A hierarchical approach for online temporal lobe seizure detection in long-term intracranial EEG recordingsLiang, Sheng-Fu; Chen, Yi-Chun; Wang, Yu-Lin; Chen, Pin-Tzu; Yang, Chia-Hsiang; Chiueh, Herming; 電子工程學系及電子研究所; 生醫電子轉譯研究中心; Department of Electronics Engineering and Institute of Electronics; Biomedical Electronics Translational Research Center
1-三月-2019An Integrated Message-Passing Detector and Decoder for Polar-Coded Massive MU-MIMO SystemsChen, Yan-Tong; Sun, Wei-Cheng; Cheng, Chung-Chao; Tsai, Tsung-Lin; Ueng, Yeong-Luh; Yang, Chia-Hsiang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2017Integration of Energy-Recycling Logic and Wireless Power Transfer for Ultra-Low-Power ImplantablesLin, Hsin-Tzu; Wu, Yi-Chung; Hsieh, Ping-Hsuan; Yang, Chia-Hsiang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2015An Iterative Geometric Mean Decomposition Algorithm for MIMO Communications SystemsChen, Chiao-En; Tsai, Yu-Cheng; Yang, Chia-Hsiang; 電機工程學系; Department of Electrical and Computer Engineering
15-三月-2019Iterative Inter-Cell Interference Cancellation Receiver for LDPC-Coded MIMO SystemsSun, Wei-Cheng; Chen, Yan-Tong; Yang, Chia-Hsiang; Ueng, Yeong-Luh; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICsWang, Yu-Zhe; Wu, Jingjie; Chen, Shi-Hao; Chao, Mango Chia-Tso; Yang, Chia-Hsiang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2012Power and Area Minimization of Reconfigurable FFT Processors: A 3GPP-LTE ExampleYang, Chia-Hsiang; Yu, Tsung-Han; Markovic, Dejan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2013Power and Area Reduction in Multi-Stage Addition Using Operand SegmentationChan, Ching-Da; Liu, Wei-Chang; Yang, Chia-Hsiang; Jou, Shyh-Jye; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Power and Area Reduction in Multi-Stage Addition Using Operand SegmentationChan, Ching-Da; Liu, Wei-Chang; Yang, Chia-Hsiang; Jou, Shyh-Jye; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
15-十一月-2016sBWT: memory efficient implementation of the hardware-acceleration-friendly Schindler transform for the fast biological sequence mappingChang, Chia-Hua; Chou, Min-Te; Wu, Yi-Chung; Hong, Ting-Wei; Li, Yun-Lung; Yang, Chia-Hsiang; Hung, Jui-Hung; 生物科技學系; 生物資訊及系統生物研究所; 分子醫學與生物工程研究所; Department of Biological Science and Technology; Institude of Bioinformatics and Systems Biology; Institute of Molecular Medicine and Bioengineering
一月-2016A Standard-Cell-Design-Flow Compatible Energy-Recycling Logic With 70% Energy SavingLee, Cheng-Yen; Hsieh, Ping-Hsuan; Yang, Chia-Hsiang; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2015A Systolic Array Based GTD Processor With a Parallel AlgorithmYang, Chia-Hsiang; Chou, Chun-Wei; Hsu, Chia-Shen; Chen, Chiao-En; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
顯示 21 到 40 筆資料，總共 53 筆 < 上一頁   下一頁 >