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公開日期標題作者
2012Alternate Hammering Test for Application-Specific DRAMs and an Industrial Case StudyHuang, Rei-Fu; Yang, Hao-Yu; Chao, Mango C. -T.; Lin, Shih-Chin; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2011Design-for-Debug Layout Adjustment for FIB Probing and Circuit EditingChen, Kuo-An; Chang, Tsung-Wei; Wu, Meng-Chen; Chao, Mango C. -T.; Jou, Jing-Yang; Chen, Sonair; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2011Detecting Stability Faults in Sub-threshold SRAMsLin, Chen-Wei; Yang, Hao-Yu; Huang, Chin-Yuan; Chen, Hung-Hsin; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012An Efficient Hamiltonian-Cycle Power-Switch Routing for MTCMOS DesignsWang, Yi-Ming; Chen, Shi-Hao; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2014Fast Transistor Threshold Voltage Measurement Method for High-Speed, High-Accuracy Advanced Process CharacterizationLuo, Tseng-Chin; Chao, Mango C. -T.; Tseng, Huan-Chi; Goto, Masaharu; Fisher, Philip A.; Chang, Yuan-Yao; Chang, Chi-Min; Takao, Takayuki; Iwasaki, Katsuhito; Lee, Cheng Mao; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2014Fast Transistor Threshold Voltage Measurement Method for High-Speed, High-Accuracy Advanced Process CharacterizationLuo, Tseng-Chin; Chao, Mango C. -T.; Tseng, Huan-Chi; Goto, Masaharu; Fisher, Philip A.; Chang, Yuan-Yao; Chang, Chi-Min; Takao, Takayuki; Iwasaki, Katsuhito; Lee, Cheng Mao; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2013Fault Models and Test Methods for Subthreshold SRAMsLin, Chen-Wei; Chen, Hung-Hsin; Yang, Hao-Yu; Huang, Chin-Yuan; Chao, Mango C. -T.; Huang, Rei-Fu; 交大名義發表; 電子工程學系及電子研究所; National Chiao Tung University; Department of Electronics Engineering and Institute of Electronics
2009Fault Models for Embedded-DRAM MacrosChao, Mango C. -T.; Yang, Hao-Yu; Huang, Rei-Fu; Lin, Shih-Chin; Chin, Ching-Yu; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2017Generating Routing-Driven Power Distribution Networks With Machine-Learning TechniqueChang, Wen-Hsiang; Lin, Chien-Hsueh; Mu, Szu-Pang; Chen, Li-De; Tsai, Cheng-Hong; Chiu, Yen-Chih; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2016Generating Routing-Driven Power Distribution Networks with Machine-Learning TechniqueChang, Wen-Hsiang; Chen, Li-De; Lin, Chien-Hsueh; Mu, Szu-Pang; Chao, Mango C. -T.; Tsai, Cheng-Hong; Chiu, Yen-Chih; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2007A hybrid scheme for compacting test responses with unknown valuesChao, Mango C. -T.; Cheng, Kwang-Ting; Wang, Seongmoon; Chakradhar, Srimat T.; Ei, Wen-Long V.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Investigation of Gate Oxide Short in FinFETs and the Test Methods for FinFET SRAMsLin, Chen-Wei; Chao, Mango C. -T.; Hsu, Chih-Chieh; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Layout-Based Dual-Cell-Aware TestsWu, Tse-Wei; Lee, Dong-Zhen; Wu, Kai-Chiang; Huang, Yu-Hao; Chen, Ying-Yen; Chen, Po-Lin; Chern, Mason; Lee, Jih-Nung; Kao, Shu-Yi; Chao, Mango C. -T.; 資訊工程學系; 電子工程學系及電子研究所; Department of Computer Science; Department of Electronics Engineering and Institute of Electronics
2010Mathematical Yield Estimation for Two-Dimensional-Redundancy Memory ArraysChao, Mango C. -T.; Chin, Ching-Yu; Lin, Chen-Wei; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2017Methodology of Generating Dual-Cell-Aware TestsHuang, Yu-Hao; Lu, Ching-Ho; Wu, Tse-Wei; Nien, Yu-Teng; Chen, Ying-Yen; Wu, Max; Lee, Jih-Nung; Chao, Mango C. -T.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009Multiple-Fault Diagnosis Using Faulty-Region IdentificationTasi, Meng-Jai; Chao, Mango C. -T.; Jou, Jing-Yang; Wu, Meng-Chen; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-五月-2011A Novel Array-Based Test Methodology for Local Process Variation MonitoringLuo, Tseng-Chin; Chao, Mango C. -T.; Wu, Michael Shien-Yang; Li, Kuo-Tsai; Hsia, Chin C.; Tseng, Huan-Chi; Fisher, Philip A.; Huang, Chuen-Uan; Chang, Yuan-Yao; Pan, Samuel C.; Young, Konrad K. -L.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A novel array-based test methodology for local process variation monitoringLuo, Tseng-Chin; Chao, Mango C. -T.; Wu, Michael S. -Y.; Li, Kuo-Tsai; Hsia, Chin C.; Tseng, Huan-Chi; Huang, Chuen-Uan; Chang, Yuan-Yao; Pan, Samuel C.; Young, Konrad K. -L.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-六月-2014Novel Circuit-Level Model for Gate Oxide Short and its Testing Method in SRAMsLin, Chen-Wei; Chao, Mango C. -T.; Hsu, Chih-Chieh; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-八月-2012A Novel Design Flow for Dummy Fill Using Boolean Mask OperationsLuo, Tseng-Chin; Chao, Mango C. -T.; Fisher, Philip A.; Kuo, Chun-Ren; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
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