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公開日期標題作者
1-一月-2018Analysis and Realization of TLC or even QLC Operation with a High Performance Multi-times Verify Scheme in 3D NAND Flash memoryLu, C. C.; Cheng, C. C.; Chiu, H. P.; Lin, W. L.; Chen, T. W.; Ku, S. H.; Tsai, Wen-Jer; Lu, T. C.; Chen, K. C.; Wang, Tahui; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2019Grain Boundary Trap-Induced Current Transient in a 3-D NAND Flash Cell StringLin, Wei-Liang; Tsai, Wen-Jer; Cheng, C. C.; Ku, S. H.; Liu, Lenvis; Hwang, S. W.; Lu, Tao-Cheng; Chen, Kuang-Chao; Tseng, Tseung-Yuen; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2019Hot-Carrier Injection-Induced Disturb and Improvement Methods in 3D NAND Flash MemoryLin, Wei-Liang; Tsai, Wen-Jer; Cheng, C. C.; Lu, Chun-Chang; Ku, S. H.; Chang, Y. W.; Wu, Guan-Wei; Liu, Lenvis; Hwang, S. W.; Lu, Tao-Cheng; Chen, Kuang-Chao; Tseng, Tseung-Yuen; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2006Investigation of hot carrier degradation modes in LDMOS by using a novel three-region charge pumping techniqueCheng, C. C.; Tu, K. C.; Wang, Tahui; Hsieh, T. H.; Tzeng, J. T.; Jong, Y. C.; Liou, R. S.; Pan, Sam C.; Hsu, S. L.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2010LAND SUBSIDENCE USING ABSOLUTE AND RELATIVE GRAVIMETRY: A CASE STUDY IN CENTRAL TAIWANHwang, Cheinway; Cheng, Tze-Chiang; Cheng, C. C.; Hung, W. C.; 土木工程學系; Department of Civil Engineering
1-一月-2016Polycrystalline-Silicon Channel Trap Induced Transient Read Instability in a 3D NAND Flash Cell StringTsai, Wen-Jer; Lin, W. L.; Cheng, C. C.; Ku, S. H.; Chou, Y. L.; Liu, Lenvis; Hwang, S. W.; Lu, T. C.; Chen, K. C.; Wang, Tahui; Lu, Chih-Yuan; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics