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公開日期標題作者
2013Comprehensive Trap-Level Study in SiOx-based Resistive Switching MemoryChang, Yao-Feng; Chen, Ying-Chen; Li, Ji; Xue, Fei; Wang, Yanzhen; Zhou, Fei; Fowler, Burt; Lee, Jack C.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-二月-2014Integrated One Diode-One Resistor Architecture in Nanopillar SiOx Resistive Switching Memory by Nanosphere LithographyJi, Li; Chang, Yao-Feng; Fowler, Burt; Chen, Ying-Chen; Tsai, Tsung-Ming; Chang, Kuan-Chang; Chen, Min-Chen; Chang, Ting-Chang; Sze, Simon M.; Yu, Edward T.; Lee, Jack C.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014Resistive Switching of SiOX with One Diode-One Resistor Nanopillar Architecture Fabricated via Nanosphere LithographyJi, Li; Chang, Yao-Feng; Fowler, Burt; Chen, Ying-Chen; Tsai, Tsung-Ming; Chang, Kuan-Chang; Chen, Min-Chen; Chang, Ting-Chang; Sze, Simon M.; Yu, Edward T.; Lee, Jack C.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2017A Universal Model for Interface-type Threshold Switching Phenomena by Comprehensive Study of Vanadium Oxide-Based SelectorLin, Chih-Yang; Chen, Ying-Chen; Gu, Meiqi; Pan, Chih-Hung; Jin, Fu-Yuan; Tseng, Yi-Ting; Hsieh, Cheng Chih; Wu, Xiaohan; Chen, Min-Chen; Chang, Yao-Feng; Zhou, Fei; Fowler, Burt; Chang, Kuan-Chang; Tsai, Tsung-Ming; Chang, Ting-Chang; Zhao, Yonggang; Sze, Simon M.; Banetjee, Sanjay; Lee, Jack C.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014The Voltage-Triggered SET Mechanism and Self-Compliance Characteristics in Intrinsic Unipolar SiOx-Based Resistive Switching MemoryChang, Yao-Feng; Fowler, Burt; Chen, Ying-Chen; Ji, Li; Zhou, Fei; Lee, Jack C.; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
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